74LVC821APW,118
| Parameters | |
|---|---|
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC821 |
| JESD-30 Code | R-PDSO-G24 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Clock Frequency | 200MHz |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.024 A |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 7.3ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 9.5 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Length | 7.8mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 24-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| Type | D-Type |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
74LVC821APW,118 Overview
It is embeded in 24-TSSOP (0.173, 4.40mm Width) case. As part of the package Tape & Reel (TR), it is embedded. T flip flop uses Tri-State, Non-Invertedas its output configuration. This trigger uses the value Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~3.6V. -40°C~125°C TAis the operating temperature. Logic flip flops of this type are classified as D-Type. In this case, it is a type of FPGA belonging to the 74LVC series. You should not exceed 200MHzin its output frequency. In total, there are 1 elements. It consumes 10μA of quiescent current without being affected by external factors. Currently, there are 24 terminations. You can search similar parts based on 74LVC821. The D flip flop is powered by a voltage of 2.7V . A JK flip flop with a 5pFfarad input capacitance is used here. It belongs to the family of electronic devices known as LVC/LCX/Z. This device has the base part number FF/Latches. It reaches 3.6Vwhen the supply voltage is maximal (Vsup). This D flip flop is well suited for TAPE AND REEL based on its reliable performance. In order for the device to operate, it requires 3.3V power supplies. This flip flop has a total of 2ports.
74LVC821APW,118 Features
Tape & Reel (TR) package
74LVC series
3.3V power supplies
74LVC821APW,118 Applications
There are a lot of NXP USA Inc. 74LVC821APW,118 Flip Flops applications.
- Matched Rise and Fall
- Differential Individual
- Memory
- Individual Asynchronous Resets
- Data storage
- Single Up Count-Control Line
- Consumer
- Count Modes
- Supports Live Insertion
- Registers
