74LVC823AD,118
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 24-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 24 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| Type | D-Type |
| Additional Feature | WITH CLEAR AND CLOCK ENABLE |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC823 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Ports | 2 |
| Number of Bits | 9 |
| Clock Frequency | 200MHz |
| Propagation Delay | 5.1 ns |
| Quiescent Current | 100μA |
| Turn On Delay Time | 3.7 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 10ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Input Lines | 9 |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74LVC823AD,118 Overview
It is packaged in the way of 24-SOIC (0.295, 7.50mm Width). There is an embedded version in the package Tape & Reel (TR). In the configuration, Tri-State, Non-Invertedis used as the output. JK flip flop uses Positive Edgeas the trigger. Surface Mountis occupied by this electronic component. A voltage of 1.65V~3.6Vis required for its operation. In this case, the operating temperature is -40°C~125°C TA. D-Typedescribes this flip flop. JK flip flop belongs to the 74LVCseries of FPGAs. It should not exceed 200MHzin its output frequency. In total, there are 1 elements. As a result, it consumes 10μA of quiescent current without being affected by external factors. A total of 24terminations have been recorded. JK flip flop belongs to 74LVC823 family. A voltage of 1.8V provides power to the D latch. There is 5pF input capacitance for this T flip flop. In this case, the D flip flop belongs to the LVC/LCX/Zfamily. In this case, the electronic component is mounted in the way of Surface Mount. 24pins are included in its design. A Positive Edgeclock edge trigger is used in this device. There are 9bits in its design. As soon as 3.6Vis reached, Vsup reaches its maximum value. The D flip flop is embedded with 2ports. It has 9lines. There is 100μA quiescent current consumption by it. Additionally, it is characterized by WITH CLEAR AND CLOCK ENABLE.
74LVC823AD,118 Features
Tape & Reel (TR) package
74LVC series
24 pins
9 Bits
74LVC823AD,118 Applications
There are a lot of Nexperia USA Inc. 74LVC823AD,118 Flip Flops applications.
- Shift Registers
- Computers
- Load Control
- Data Synchronizers
- Data storage
- Convert a momentary switch to a toggle switch
- 2 – Bit synchronous counter
- Buffer registers
- Memory
- Frequency Dividers
