Parameters |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
24-SSOP (0.209, 5.30mm Width) |
Number of Pins |
24 |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVC |
JESD-609 Code |
e4 |
Part Status |
Not For New Designs |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
24 |
Type |
D-Type |
Additional Feature |
WITH CLEAR AND CLOCK ENABLE |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LVC823 |
Function |
Master Reset |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Number of Ports |
2 |
Number of Bits |
9 |
Clock Frequency |
200MHz |
Propagation Delay |
5.1 ns |
Quiescent Current |
100μA |
Turn On Delay Time |
3.7 ns |
Family |
LVC/LCX/Z |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
10ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Number of Input Lines |
9 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2mm |
Length |
8.2mm |
Width |
5.3mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
74LVC823ADB,118 Overview
24-SSOP (0.209, 5.30mm Width)is the way it is packaged. It is included in the package Tape & Reel (TR). Currently, the output is configured to use Tri-State, Non-Inverted. The trigger configured with it uses Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at a voltage of 1.65V~3.6V. Temperature is set to -40°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. The FPGA belongs to the 74LVC series. In order for it to function properly, its output frequency should not exceed 200MHz. The element count is 1 . This process consumes 10μA quiescents. Terminations are 24. The 74LVC823 family contains this object. It is powered from a supply voltage of 1.8V. A JK flip flop with a 5pFfarad input capacitance is used here. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. It is mounted by the way of Surface Mount. A total of 24pins are provided on this board. This device's clock edge trigger type is Positive Edge. There are 9bits in its design. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. This D flip flop is equipped with 0 ports. The number of input lines is 9. Quiescent current is consumed by the D latch in the amount of 100μA. In addition, you can refer to the additinal WITH CLEAR AND CLOCK ENABLE of the D latch.
74LVC823ADB,118 Features
Tape & Reel (TR) package
74LVC series
24 pins
9 Bits
74LVC823ADB,118 Applications
There are a lot of Nexperia USA Inc. 74LVC823ADB,118 Flip Flops applications.
- Synchronous counter
- Modulo – n – counter
- Safety Clamp
- Buffer registers
- Latch-up performance
- Test & Measurement
- Set-reset capability
- Instrumentation
- ESCC
- Supports Live Insertion