74LVCH16374ADL,112
| Parameters | |
|---|---|
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 48-BSSOP (0.295, 7.50mm Width) |
| Number of Pins | 48 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LVCH |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 48 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.635mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVCH16374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Ports | 2 |
| Number of Bits | 16 |
| Clock Frequency | 300MHz |
| Propagation Delay | 3.8 ns |
| Quiescent Current | 100nA |
| Turn On Delay Time | 7 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 5.4ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Output Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
74LVCH16374ADL,112 Overview
It is embeded in 48-BSSOP (0.295, 7.50mm Width) case. The package Tubecontains it. As configured, the output uses Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. Surface Mountis in the way of this electric part. The supply voltage is set to 1.65V~3.6V. Currently, the operating temperature is -40°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. This type of FPGA is a part of the 74LVCH series. Its output frequency should not exceed 300MHz Hz. A total of 2elements are contained within it. This process consumes 20μA quiescents. A total of 48terminations have been recorded. This D latch belongs to the family of 74LVCH16374. The power supply voltage is 2.7V. Its input capacitance is 5pFfarads. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. A part of the electronic system is mounted in the way of Surface Mount. It is designed with 48 pins. This device has the clock edge trigger type of Positive Edge. This flip flop is designed with 16 Bits. Vsup reaches its maximum value at 3.6V. This flip flop has a total of 2ports. The JK flip flop is with 8 output lines to operate. Quiescent current is consumed by the D latch in the amount of 100nA.
74LVCH16374ADL,112 Features
Tube package
74LVCH series
48 pins
16 Bits
74LVCH16374ADL,112 Applications
There are a lot of Nexperia USA Inc. 74LVCH16374ADL,112 Flip Flops applications.
- Power down protection
- Bounce elimination switch
- Computers
- Load Control
- Storage registers
- Frequency Divider circuits
- Consumer
- Test & Measurement
- Buffered Clock
- EMI reduction circuitry
