74LVCH16374APAG
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mounting Type | Surface Mount |
| Package / Case | 48-TFSOP (0.240, 6.10mm Width) |
| Supplier Device Package | 48-TSSOP |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVCH |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 2.7V~3.6V |
| Base Part Number | 74LVCH16374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Clock Frequency | 150MHz |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| RoHS Status | ROHS3 Compliant |
74LVCH16374APAG Overview
48-TFSOP (0.240, 6.10mm Width)is the packaging method. D flip flop is embedded in the Tube package. T flip flop is configured with an output of Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. The electronic part is mounted in the way of Surface Mount. A 2.7V~3.6Vsupply voltage is required for it to operate. A temperature of -40°C~85°C TAis used in the operation. D-Typeis the type of this D latch. It belongs to the 74LVCHseries of FPGAs. A frequency of 150MHzshould not be exceeded by its output. A total of 2elements are contained within it. As a result, it consumes 10μA quiescent current. The 74LVCH16374 family contains it. Its input capacitance is 4.5pF farads.
74LVCH16374APAG Features
Tube package
74LVCH series
74LVCH16374APAG Applications
There are a lot of Renesas Electronics America Inc. 74LVCH16374APAG Flip Flops applications.
- Computers
- Automotive
- Balanced 24 mA output drivers
- Circuit Design
- Computing
- Differential Individual
- ESD protection
- Set-reset capability
- Individual Asynchronous Resets
- EMI reduction circuitry
