74LVQ174MTR
| Parameters | |
|---|---|
| Clock Frequency | 150MHz |
| Propagation Delay | 11 ns |
| Turn On Delay Time | 5.5 ns |
| Family | LVQ |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 8ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Output Lines | 6 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 9.9mm |
| Width | 3.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVQ |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVQ174 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 7 |
| Load Capacitance | 50pF |
| Number of Bits | 6 |
74LVQ174MTR Overview
It is embeded in 16-SOIC (0.154, 3.90mm Width) case. The package Tape & Reel (TR)contains it. T flip flop is configured with an output of Non-Inverted. In the configuration of the trigger, Positive Edgeis used. This electronic part is mounted in the way of Surface Mount. A voltage of 2V~3.6Vis used as the supply voltage. Temperature is set to -55°C~125°C TA. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74LVQseries FPGA. You should not exceed 150MHzin the output frequency of the device. In total, it contains 1 elements. There is 4μA quiescent consumption. There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 74LVQ174 family contains this object. It is powered from a supply voltage of 2.7V. There is 4pF input capacitance for this T flip flop. The electronic device belongs to the LVQfamily. The electronic part is mounted in the way of Surface Mount. The 16pins are designed into the board. Its clock edge trigger type is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. There are 6bits in its design. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. The superior flexibility of this circuit is achieved by using 7 circuits. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. The D latch operates on 3.3V volts. It is designed with 6 output lines.
74LVQ174MTR Features
Tape & Reel (TR) package
74LVQ series
16 pins
6 Bits
3.3V power supplies
74LVQ174MTR Applications
There are a lot of STMicroelectronics 74LVQ174MTR Flip Flops applications.
- Clock pulse
- High Performance Logic for test systems
- ESCC
- Individual Asynchronous Resets
- Power down protection
- ATE
- Bounce elimination switch
- Balanced 24 mA output drivers
- Differential Individual
- Modulo – n – counter
