74LVQ174SJ
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.209, 5.30mm Width) |
| Supplier Device Package | 16-SOP |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVQ |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 2V~3.6V |
| Base Part Number | 74LVQ174 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 100MHz |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 6 |
| Max Propagation Delay @ V, Max CL | 11.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
74LVQ174SJ Overview
The item is packaged in 16-SOIC (0.209, 5.30mm Width)cases. It is contained within the Tubepackage. It is configured with Non-Invertedas an output. It is configured with the trigger Positive Edge. There is an electronic component mounted in the way of Surface Mount. A 2V~3.6Vsupply voltage is required for it to operate. It is at -40°C~85°C TAdegrees Celsius that the system is operating. The type of this D latch is D-Type. In this case, it is a type of FPGA belonging to the 74LVQ series. It should not exceed 100MHzin its output frequency. A total of 1elements are present in it. It consumes 40μA of quiescent current without being affected by external factors. The 74LVQ174 family contains this object. This JK flip flop has a 4.5pFfarad input capacitance.
74LVQ174SJ Features
Tube package
74LVQ series
74LVQ174SJ Applications
There are a lot of ON Semiconductor 74LVQ174SJ Flip Flops applications.
- Power down protection
- Latch-up performance
- Digital electronics systems
- Buffer registers
- EMI reduction circuitry
- Dynamic threshold performance
- Memory
- High Performance Logic for test systems
- Shift registers
- Single Down Count-Control Line
