74LVQ273SCX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVQ |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Master Reset |
| Qualification Status | COMMERCIAL |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2V |
| Clock Frequency | 90MHz |
| Family | LVQ |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 12mA 12mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Propagation Delay (tpd) | 20.5 ns |
| fmax-Min | 75 MHz |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74LVQ273SCX Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. The package Tape & Reel (TR)contains it. T flip flop is configured with an output of Non-Inverted. The trigger configured with it uses Positive Edge. Surface Mountis occupied by this electronic component. It operates with a supply voltage of 2V~3.6V. In this case, the operating temperature is -40°C~85°C TA. This D latch has the type D-Type. In FPGA terms, D flip flop is a type of 74LVQseries FPGA. There should be no greater frequency than 90MHzon its output. There are 1 elements in it. T flip flop consumes 40μA quiescent energy. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. A voltage of 2.7V is used as the power supply for this D latch. There is 4.5pF input capacitance for this T flip flop. In terms of electronic devices, this device belongs to the LVQfamily of devices. In this case, the maximum supply voltage (Vsup) reaches 3.6V. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation.
74LVQ273SCX Features
Tape & Reel (TR) package
74LVQ series
74LVQ273SCX Applications
There are a lot of Rochester Electronics, LLC 74LVQ273SCX Flip Flops applications.
- 2 – Bit synchronous counter
- Memory
- Clock pulse
- Consumer
- Data transfer
- Registers
- Balanced 24 mA output drivers
- Automotive
- Modulo – n – counter
- Set-reset capability
