74LVQ273SJX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.209, 5.30mm Width) |
| Supplier Device Package | 20-SOP |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVQ |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 2V~3.6V |
| Base Part Number | 74LVQ273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 90MHz |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
74LVQ273SJX Overview
The item is packaged in 20-SOIC (0.209, 5.30mm Width)cases. As part of the package Tape & Reel (TR), it is embedded. T flip flop uses Non-Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. Powered by a 2V~3.6Vvolt supply, it operates as follows. -40°C~85°C TAis the operating temperature. This D latch has the type D-Type. The FPGA belongs to the 74LVQ series. You should not exceed 90MHzin its output frequency. The list contains 1 elements. This process consumes 40μA quiescents. D latch belongs to the 74LVQ273 family. This JK flip flop has a 4.5pFfarad input capacitance.
74LVQ273SJX Features
Tape & Reel (TR) package
74LVQ series
74LVQ273SJX Applications
There are a lot of ON Semiconductor 74LVQ273SJX Flip Flops applications.
- Automotive
- Individual Asynchronous Resets
- Shift registers
- Event Detectors
- Buffer registers
- Differential Individual
- Supports Live Insertion
- Patented noise
- Divide a clock signal by 2 or 4
- Memory
