74LVQ74TTR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVQ |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVQ74 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Clock Frequency | 250MHz |
| Propagation Delay | 12 ns |
| Turn On Delay Time | 6.3 ns |
| Family | LVQ |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LVQ74TTR Overview
The package is in the form of 14-TSSOP (0.173, 4.40mm Width). Package Tape & Reel (TR)embeds it. It is configured with Differentialas an output. The trigger configured with it uses Positive Edge. It is mounted in the way of Surface Mount. A voltage of 2V~3.6Vis used as the supply voltage. In the operating environment, the temperature is -55°C~125°C TA. D-Typeis the type of this D latch. The FPGA belongs to the 74LVQ series. A frequency of 250MHzshould be the maximum output frequency. As a result, it consumes 2μA of quiescent current without being affected by external factors. It has been determined that there have been 14 terminations. It is a member of the 74LVQ74 family. Power is provided by a 2.7V supply. The input capacitance of this JK flip flopis 4pF farads. LVQis the family of this D flip flop. Electronic part Surface Mountis mounted in the way. 14pins are included in its design. There is a clock edge trigger type of Positive Edgeon this device. This RS flip flops is a part number FF/Latches. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. For normal operation, the supply voltage (Vsup) should be kept above 2V. The superior flexibility of this product is achieved by using 2 circuits. In light of its reliable performance, this T flip flop is well suited for TAPE AND REEL. A total of 3.3V power supplies are needed to run it. There are 1 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code.
74LVQ74TTR Features
Tape & Reel (TR) package
74LVQ series
14 pins
3.3V power supplies
74LVQ74TTR Applications
There are a lot of STMicroelectronics 74LVQ74TTR Flip Flops applications.
- Memory
- Individual Asynchronous Resets
- Power down protection
- Computers
- High Performance Logic for test systems
- Synchronous counter
- Matched Rise and Fall
- Buffer registers
- Bus hold
- Circuit Design
