74LVT273D,112
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVT |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVT273 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2.7V |
| Load Capacitance | 50pF |
| Clock Frequency | 150MHz |
| Family | LVT |
| Current - Quiescent (Iq) | 190μA |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.064 A |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 5.5ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 5.5 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 5.9 ns |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74LVT273D,112 Overview
20-SOIC (0.295, 7.50mm Width)is the way it is packaged. D flip flop is embedded in the Tube package. T flip flop uses Non-Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates at a voltage of 2.7V~3.6V. A temperature of -40°C~85°C TAis used in the operation. A flip flop of this type is classified as a D-Type. This type of FPGA is a part of the 74LVT series. A frequency of 150MHzshould not be exceeded by its output. In total, it contains 1 elements. As a result, it consumes 190μA quiescent current and is not affected by external forces. Terminations are 20. If you search by 74LVT273, you will find similar parts. It is powered by a voltage of 3.3V . This JK flip flop has a 4pFfarad input capacitance. A device of this type belongs to the family of LVT. This part is included in FF/Latches. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. Keeping the supply voltage (Vsup) above 2.7V is necessary for normal operation. In order for the device to operate, it requires 3.3V power supplies.
74LVT273D,112 Features
Tube package
74LVT series
3.3V power supplies
74LVT273D,112 Applications
There are a lot of NXP USA Inc. 74LVT273D,112 Flip Flops applications.
- Frequency division
- ESD protection
- Count Modes
- Dynamic threshold performance
- Instrumentation
- Shift registers
- Event Detectors
- Set-reset capability
- Guaranteed simultaneous switching noise level
- Individual Asynchronous Resets
