74LVT374D,118
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVT |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVT374 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2.7V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Clock Frequency | 200MHz |
| Family | LVT |
| Current - Quiescent (Iq) | 190μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.064 A |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 5.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 5.5 ns |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74LVT374D,118 Overview
The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). You can find it in the Tape & Reel (TR)package. In the configuration, Tri-State, Non-Invertedis used as the output. The trigger it is configured with uses Positive Edge. Surface Mountis in the way of this electric part. A voltage of 2.7V~3.6Vis used as the supply voltage. It is operating at a temperature of -40°C~85°C TA. This D latch has the type D-Type. FPGAs belonging to the 74LVTseries contain this type of chip. It should not exceed 200MHzin its output frequency. A total of 1elements are present in it. Despite external influences, it consumes 190μAof quiescent current. There have been 20 terminations. The 74LVT374 family contains it. A voltage of 3.3V is used to power it. The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It belongs to the family of electronic devices known as LVT. This RS flip flops is a part number FF/Latches. In this case, the maximum supply voltage (Vsup) reaches 3.6V. The supply voltage (Vsup) should be kept above 2.7V for normal operation. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. The D latch runs on a voltage of 3.3V volts. A D flip flop with 2embedded ports is available.
74LVT374D,118 Features
Tape & Reel (TR) package
74LVT series
3.3V power supplies
74LVT374D,118 Applications
There are a lot of NXP USA Inc. 74LVT374D,118 Flip Flops applications.
- Data transfer
- Divide a clock signal by 2 or 4
- Synchronous counter
- High Performance Logic for test systems
- Individual Asynchronous Resets
- Functionally equivalent to the MC10/100EL29
- Common Clocks
- Control circuits
- Dynamic threshold performance
- CMOS Process
