Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
BICMOS |
Voltage - Supply |
2.7V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LVT534 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2.7V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
150MHz |
Family |
LVT |
Current - Quiescent (Iq) |
190μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Max I(ol) |
0.064 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
4.9ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
4.9 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
5.4 ns |
Height Seated (Max) |
2mm |
Length |
7.2mm |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
74LVT534DB,118 Overview
As a result, it is packaged as 20-SSOP (0.209, 5.30mm Width). D flip flop is included in the Tape & Reel (TR)package. Currently, the output is configured to use Tri-State, Inverted. This trigger uses the value Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The supply voltage is set to 2.7V~3.6V. -40°C~85°C TAis the operating temperature. Logic flip flops of this type are classified as D-Type. In this case, it is a type of FPGA belonging to the 74LVT series. There should be no greater frequency than 150MHzon its output. In total, it contains 1 elements. There is 190μA quiescent consumption. A total of 20 terminations have been made. The 74LVT534 family contains it. A voltage of 3.3V is used to power it. Its input capacitance is 4pFfarads. It is a member of the LVTfamily of D flip flop. It is included in FF/Latches. Vsup reaches its maximum value at 3.6V. Normally, the supply voltage (Vsup) should be kept above 2.7V. In view of its reliability, this D flip flop is a good fit for TAPE AND REEL. An electrical current of 3.3V volts is applied to it. A total of 2ports are embedded in the D flip flop.
74LVT534DB,118 Features
Tape & Reel (TR) package
74LVT series
3.3V power supplies
74LVT534DB,118 Applications
There are a lot of NXP USA Inc. 74LVT534DB,118 Flip Flops applications.
- Matched Rise and Fall
- Communications
- Test & Measurement
- Divide a clock signal by 2 or 4
- Balanced 24 mA output drivers
- Memory
- Patented noise
- Balanced Propagation Delays
- Event Detectors
- Counters