74LVT573WM
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 801mg |
| Operating Temperature | -40°C~85°C |
| Packaging | Tube |
| Series | 74LVT |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Voltage - Supply | 2.7V~3.6V |
| Base Part Number | 74LVT573 |
| Output Type | Tri-State |
| Operating Supply Voltage | 3.3V |
| Circuit | 8:8 |
| Polarity | Non-Inverting |
| Nominal Supply Current | 5mA |
| Output Current | 64mA |
| Propagation Delay | 4.4 ns |
| Turn On Delay Time | 1.5 ns |
| Logic Function | D-Type, Latch |
| Current - Output High, Low | 32mA 64mA |
| Logic Type | D-Type Transparent Latch |
| Number of Gates | 8 |
| Number of Input Lines | 2 |
| Independent Circuits | 1 |
| REACH SVHC | No SVHC |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
74LVT573WM Overview
20-SOIC (0.295, 7.50mm Width) contains it. A Tube package is used to package it. It is configured with an output of Tri-State. In this electrical device, the logic type is D-Type Transparent Latch. Mounting this electronic component follows the Surface Mount method. A voltage of 2.7V~3.6V is used as the supply voltage for this device. It operates at -40°C~85°C degrees Celsius. The 74LVT series of FPGAs is the one this FPGA belongs to. It is a member of the 74LVT573 family. It is designed with 20 pins. Electronic parts are mounted using the Surface Mount method. There are 2 input lines in which electronic circuits are present. The output current of 64mA makes it feature maximum design flexibility. High efficiency requires maintaining the supply voltage at 3.3V.
74LVT573WM Features
20-SOIC (0.295, 7.50mm Width) package
74LVT series
74LVT573 family
20 pins
74LVT573WM Applications
There are a lot of ON Semiconductor 74LVT573WM Latches applications.
- Parallel Input
- Lamp and Display (LED)
- OC-48 communication systems
- Relay
- Frequency
- Decade counting
- Clocks
- Shift left with parallel loading
- Communication systems
- Buffer/Storage Registers
