Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LVT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
BROADSIDE VERSION OF 374 |
Subcategory |
FF/Latches |
Technology |
BICMOS |
Voltage - Supply |
2.7V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LVT574 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2.7V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
150MHz |
Family |
LVT |
Current - Quiescent (Iq) |
190μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.064 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
5.9ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
5.9 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
6.6 ns |
Length |
6.5mm |
Width |
4.4mm |
RoHS Status |
ROHS3 Compliant |
74LVT574PW,112 Overview
20-TSSOP (0.173, 4.40mm Width)is the way it is packaged. The package Tubecontains it. In the configuration, Tri-State, Non-Invertedis used as the output. In the configuration of the trigger, Positive Edgeis used. There is an electric part mounted in the way of Surface Mount. A voltage of 2.7V~3.6Vis used as the supply voltage. It is operating at a temperature of -40°C~85°C TA. A flip flop of this type is classified as a D-Type. The FPGA belongs to the 74LVT series. There should be no greater frequency than 150MHzon its output. In total, there are 1 elements. As a result, it consumes 190μA of quiescent current without being affected by external factors. There are 20 terminations,If you search by 74LVT574, you will find similar parts. The power supply voltage is 3V. Its input capacitance is 4pFfarads. LVTis the family of this D flip flop. This part is included in FF/Latches. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. For normal operation, the supply voltage (Vsup) should be above 2.7V. A total of 3.3V power supplies are needed to run it. The flip flop has 2ports embedded within it. In addition, BROADSIDE VERSION OF 374is a characteristic of it.
74LVT574PW,112 Features
Tube package
74LVT series
3.3V power supplies
74LVT574PW,112 Applications
There are a lot of NXP USA Inc. 74LVT574PW,112 Flip Flops applications.
- Single Up Count-Control Line
- Safety Clamp
- Computing
- Memory
- Reduced system switching noise
- Cold spare funcion
- CMOS Process
- Balanced 24 mA output drivers
- Patented noise
- Counters