74LVT574PW,118
| Parameters | |
|---|---|
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Additional Feature | BROADSIDE VERSION OF 374 |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVT574 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2.7V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Clock Frequency | 150MHz |
| Family | LVT |
| Current - Quiescent (Iq) | 190μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.064 A |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 5.9ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 5.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 6.6 ns |
| Length | 6.5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVT |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
74LVT574PW,118 Overview
20-TSSOP (0.173, 4.40mm Width)is the packaging method. The Tape & Reel (TR)package contains it. This output is configured with Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. It operates with a supply voltage of 2.7V~3.6V. Temperature is set to -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. FPGAs belonging to the 74LVTseries contain this type of chip. There should be no greater frequency than 150MHzon its output. In total, it contains 1 elements. It consumes 190μA of quiescent current without being affected by external factors. Terminations are 20. The 74LVT574 family contains this object. Power is supplied from a voltage of 3.3V volts. Input capacitance of this device is 4pF farads. LVTis the family of this D flip flop. It is included in FF/Latches. 3.6Vis the maximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be above 2.7V. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. The power supply is 3.3V. The flip flop contains 2ports. Additionally, you may refer to the additional BROADSIDE VERSION OF 374 of the electronic flip flop.
74LVT574PW,118 Features
Tape & Reel (TR) package
74LVT series
3.3V power supplies
74LVT574PW,118 Applications
There are a lot of NXP USA Inc. 74LVT574PW,118 Flip Flops applications.
- ESD performance
- Data storage
- Divide a clock signal by 2 or 4
- Clock pulse
- Single Down Count-Control Line
- ESD protection
- QML qualified product
- Patented noise
- Data Synchronizers
- Safety Clamp
