74LVT74D,112
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVT |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVT74 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Load Capacitance | 50pF |
| Clock Frequency | 345MHz |
| Family | LVT |
| Current - Quiescent (Iq) | 1mA |
| Current - Output High, Low | 20mA 32mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 5 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Propagation Delay (tpd) | 5 ns |
| Length | 8.65mm |
| Width | 3.9mm |
| RoHS Status | ROHS3 Compliant |
74LVT74D,112 Overview
14-SOIC (0.154, 3.90mm Width)is the packaging method. There is an embedded version in the package Tube. T flip flop uses Differentialas its output configuration. In the configuration of the trigger, Positive Edgeis used. Surface Mountmounts this electrical part. A voltage of 2.7V~3.6Vis required for its operation. In the operating environment, the temperature is -40°C~85°C TA. It is an electronic flip flop with the type D-Type. The FPGA belongs to the 74LVT series. This D flip flop should not have a frequency greater than 345MHz. In total, there are 2 elements. As a result, it consumes 1mA of quiescent current without being affected by external factors. Terminations are 14. If you search by 74LVT74, you will find similar parts. It is powered from a supply voltage of 3.3V. This JK flip flop has a 3pFfarad input capacitance. An electronic device belonging to the family LVTcan be found here. It is part of the FF/Latchesbase part number family. 3.6Vis the maximum supply voltage (Vsup). An electrical current of 3.3V volts is applied to it.
74LVT74D,112 Features
Tube package
74LVT series
3.3V power supplies
74LVT74D,112 Applications
There are a lot of NXP USA Inc. 74LVT74D,112 Flip Flops applications.
- Data Synchronizers
- Buffered Clock
- Individual Asynchronous Resets
- Supports Live Insertion
- Buffer registers
- Count Modes
- Single Up Count-Control Line
- Counters
- Memory
- Storage registers
