74LVT74D/AUJ
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Supplier Device Package | 14-SO |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVT |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 2.7V~3.6V |
| Base Part Number | 74LVT74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 2 |
| Clock Frequency | 345MHz |
| Current - Quiescent (Iq) | 1mA |
| Current - Output High, Low | 20mA 32mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| RoHS Status | ROHS3 Compliant |
74LVT74D/AUJ Overview
14-SOIC (0.154, 3.90mm Width)is the way it is packaged. The Tape & Reel (TR)package contains it. T flip flop uses Differentialas the output. It is configured with the trigger Positive Edge. Surface Mountmounts this electrical part. With a supply voltage of 2.7V~3.6V volts, it operates. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This electronic flip flop is of type D-Type. JK flip flop belongs to the 74LVTseries of FPGAs. There should be no greater frequency than 345MHzon its output. The list contains 2 elements. This process consumes 1mA quiescents. The object belongs to the 74LVT74 family. There is 3pF input capacitance for this T flip flop.
74LVT74D/AUJ Features
Tape & Reel (TR) package
74LVT series
74LVT74D/AUJ Applications
There are a lot of NXP USA Inc. 74LVT74D/AUJ Flip Flops applications.
- Data storage
- CMOS Process
- Divide a clock signal by 2 or 4
- Frequency division
- Patented noise
- Memory
- Individual Asynchronous Resets
- Storage Registers
- Data Synchronizers
- Balanced Propagation Delays
