74LVT74DB,112
| Parameters | |
|---|---|
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVT74 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Load Capacitance | 50pF |
| Clock Frequency | 345MHz |
| Family | LVT |
| Current - Quiescent (Iq) | 1mA |
| Current - Output High, Low | 20mA 32mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 5 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Propagation Delay (tpd) | 5 ns |
| Width | 5.3mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 14-SSOP (0.209, 5.30mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVT |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
74LVT74DB,112 Overview
The flip flop is packaged in 14-SSOP (0.209, 5.30mm Width). The Tubepackage contains it. Currently, the output is configured to use Differential. The trigger it is configured with uses Positive Edge. Surface Mountis occupied by this electronic component. The JK flip flop operates at a voltage of 2.7V~3.6V. A temperature of -40°C~85°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. JK flip flop belongs to the 74LVTseries of FPGAs. It should not exceed 345MHzin terms of its output frequency. There are 2 elements in it. This process consumes 1mA quiescents. A total of 14terminations have been recorded. This D latch belongs to the family of 74LVT74. It is powered from a supply voltage of 3.3V. A 3pFfarad input capacitance is provided by this T flip flop. Electronic devices of this type belong to the LVTfamily. This device is part of the FF/Latchesbase part number family. Vsup reaches 3.6V, the maximal supply voltage. It runs on 3.3Vvolts of power.
74LVT74DB,112 Features
Tube package
74LVT series
3.3V power supplies
74LVT74DB,112 Applications
There are a lot of NXP USA Inc. 74LVT74DB,112 Flip Flops applications.
- Communications
- Guaranteed simultaneous switching noise level
- Instrumentation
- Digital electronics systems
- Data storage
- Bus hold
- Single Down Count-Control Line
- Reduced system switching noise
- QML qualified product
- Control circuits
