74LVTH273MTCX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVTH |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Master Reset |
| Qualification Status | COMMERCIAL |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2.7V |
| Clock Frequency | 150MHz |
| Family | LVT |
| Current - Quiescent (Iq) | 190μA |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 4.9ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Propagation Delay (tpd) | 5.5 ns |
| Length | 6.5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
74LVTH273MTCX Overview
The item is packaged in 20-TSSOP (0.173, 4.40mm Width)cases. It is included in the package Tape & Reel (TR). T flip flop is configured with an output of Non-Inverted. This trigger is configured to use Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A supply voltage of 2.7V~3.6V is required for operation. Temperature is set to -40°C~85°C TA. D-Typedescribes this flip flop. The FPGA belongs to the 74LVTH series. Its output frequency should not exceed 150MHz. D latch consists of 1 elements. It consumes 190μA of quiescent current without being affected by external factors. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Power is supplied from a voltage of 3V volts. The input capacitance of this JK flip flopis 3pF farads. In terms of electronic devices, this device belongs to the LVTfamily of devices. Vsup reaches its maximum value at 3.6V. Normally, the supply voltage (Vsup) should be kept above 2.7V.
74LVTH273MTCX Features
Tape & Reel (TR) package
74LVTH series
74LVTH273MTCX Applications
There are a lot of Rochester Electronics, LLC 74LVTH273MTCX Flip Flops applications.
- Cold spare funcion
- Data storage
- Set-reset capability
- Asynchronous counter
- Reduced system switching noise
- Frequency division
- Load Control
- Communications
- Functionally equivalent to the MC10/100EL29
- QML qualified product
