Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVTH |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
BICMOS |
Voltage - Supply |
2.7V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LVTH574 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2.7V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
150MHz |
Family |
LVT |
Current - Quiescent (Iq) |
190μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
32mA 64mA |
Output Polarity |
TRUE |
Max I(ol) |
0.064 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
5.9ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
5.9 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
6.6 ns |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
ROHS3 Compliant |
74LVTH574D,118 Overview
As a result, it is packaged as 20-SOIC (0.295, 7.50mm Width). It is included in the package Tape & Reel (TR). There is a Tri-State, Non-Invertedoutput configured with it. It is configured with a trigger that uses Positive Edge. There is an electronic component mounted in the way of Surface Mount. A 2.7V~3.6Vsupply voltage is required for it to operate. In the operating environment, the temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. In this case, it is a type of FPGA belonging to the 74LVTH series. In order for it to function properly, its output frequency should not exceed 150MHz. In total, there are 1 elements. There is 190μA quiescent consumption. It has been determined that there have been 20 terminations. The 74LVTH574family includes it. Power is supplied from a voltage of 3.3V volts. Its input capacitance is 4pFfarads. This D flip flop belongs to the family of LVT. This part is included in FF/Latches. It reaches the maximum supply voltage (Vsup) at 3.6V. Keeping the supply voltage (Vsup) above 2.7V is necessary for normal operation. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. In order for the device to operate, it requires 3.3V power supplies. This flip flop has a total of 2ports.
74LVTH574D,118 Features
Tape & Reel (TR) package
74LVTH series
3.3V power supplies
74LVTH574D,118 Applications
There are a lot of NXP USA Inc. 74LVTH574D,118 Flip Flops applications.
- Latch-up performance
- Asynchronous counter
- Buffer registers
- Single Up Count-Control Line
- Load Control
- Set-reset capability
- Latch
- Event Detectors
- 2 – Bit synchronous counter
- ESCC