Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 18 hours ago) |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
20 |
Weight |
191mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LVTH |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
ECCN Code |
EAR99 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
BICMOS |
Voltage - Supply |
2.7V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
3.3V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVTH574 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
3.3V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
2.7V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
150MHz |
Propagation Delay |
5.3 ns |
Turn On Delay Time |
4.5 ns |
Family |
LVT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
190μA |
Current - Output High, Low |
32mA 64mA |
Max I(ol) |
0.064 A |
Max Propagation Delay @ V, Max CL |
4.6ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Length |
6.5mm |
Width |
4.4mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
74LVTH574MTC Overview
The flip flop is packaged in 20-TSSOP (0.173, 4.40mm Width). It is included in the package Tube. T flip flop uses Tri-State, Non-Invertedas its output configuration. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis positioned in the way of this electronic part. A supply voltage of 2.7V~3.6V is required for operation. Temperature is set to -40°C~85°C TA. This D latch has the type D-Type. It is a type of FPGA belonging to the 74LVTH series. A frequency of 150MHzshould be the maximum output frequency. In total, there are 1 elements. It consumes 190μA of quiescent 20terminations have occurred. It is a member of the 74LVTH574 family. It is powered from a supply voltage of 3.3V. This T flip flop has a capacitance of 4pF farads at the input. Electronic devices of this type belong to the LVTfamily. It is mounted by the way of Surface Mount. It is designed with 20 pins. In this device, the clock edge trigger type is Positive Edge. It is included in FF/Latches. It is designed with 8bits. Normal operation requires a supply voltage (Vsup) above 2.7V. Its flexibility is enhanced by 8 circuits. In light of its reliable performance, this T flip flop is well suited for RAIL. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. If high efficiency is to be achieved, the supply voltage should be maintained at 3.3V. There are 3 output lines in this JK flip flop.
74LVTH574MTC Features
Tube package
74LVTH series
20 pins
8 Bits
74LVTH574MTC Applications
There are a lot of ON Semiconductor 74LVTH574MTC Flip Flops applications.
- Modulo – n – counter
- Control circuits
- Computers
- Differential Individual
- ESD protection
- Frequency division
- EMI reduction circuitry
- Bounce elimination switch
- Power down protection
- Synchronous counter