74LVTH574PW,118
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVTH |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVTH574 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2.7V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Clock Frequency | 150MHz |
| Family | LVT |
| Current - Quiescent (Iq) | 190μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 64mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.064 A |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 5.9ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 5.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Propagation Delay (tpd) | 6.6 ns |
| Length | 6.5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
74LVTH574PW,118 Overview
The item is packaged in 20-TSSOP (0.173, 4.40mm Width)cases. D flip flop is included in the Tape & Reel (TR)package. In the configuration, Tri-State, Non-Invertedis used as the output. The trigger it is configured with uses Positive Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 2.7V~3.6Vis required for its operation. In the operating environment, the temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. This type of FPGA is a part of the 74LVTH series. A frequency of 150MHzshould be the maximum output frequency. D latch consists of 1 elements. As a result, it consumes 190μA of quiescent current without being affected by external factors. It has been determined that there have been 20 terminations. D latch belongs to the 74LVTH574 family. The power source is powered by 3.3V. Input capacitance of this device is 4pF farads. In terms of electronic devices, this device belongs to the LVTfamily of devices. The RS flip flops belongs to FF/Latches base part number. As soon as 3.6Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be kept above 2.7V for normal operation. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. The D latch operates on 3.3V volts. The D flip flop has no ports embedded.
74LVTH574PW,118 Features
Tape & Reel (TR) package
74LVTH series
3.3V power supplies
74LVTH574PW,118 Applications
There are a lot of NXP USA Inc. 74LVTH574PW,118 Flip Flops applications.
- Data transfer
- Divide a clock signal by 2 or 4
- Shift registers
- Patented noise
- Buffered Clock
- Asynchronous counter
- Communications
- ESCC
- Event Detectors
- QML qualified product
