74LVX112MTCX
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVX |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Function | Set(Preset) and Reset |
| Qualification Status | COMMERCIAL |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2V |
| Clock Frequency | 150MHz |
| Family | LV/LV-A/LVX/H |
| Current - Quiescent (Iq) | 2μA |
| Current - Output High, Low | 4mA 4mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 15ns @ 3.3V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 4pF |
| Length | 5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
74LVX112MTCX Overview
The flip flop is packaged in 16-TSSOP (0.173, 4.40mm Width). As part of the package Tape & Reel (TR), it is embedded. In the configuration, Differentialis used as the output. It is configured with the trigger Negative Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~3.6V volts. It is operating at a temperature of -40°C~85°C TA. Logic flip flops of this type are classified as JK Type. FPGAs belonging to the 74LVXseries contain this type of chip. This D flip flop should not have a frequency greater than 150MHz. In total, it contains 2 elements. There is 2μA quiescent consumption. The number of terminations is 16. The D flip flop is powered by a voltage of 2.7V . A 4pFfarad input capacitance is provided by this T flip flop. A device of this type belongs to the family of LV/LV-A/LVX/H. There is a 3.6Vmaximum supply voltage (Vsup). The supply voltage (Vsup) should be maintained above 2V for normal operation.
74LVX112MTCX Features
Tape & Reel (TR) package
74LVX series
74LVX112MTCX Applications
There are a lot of Rochester Electronics, LLC 74LVX112MTCX Flip Flops applications.
- Count Modes
- ESD protection
- Bus hold
- Latch
- Dynamic threshold performance
- Cold spare funcion
- Computing
- Common Clocks
- Single Up Count-Control Line
- Balanced 24 mA output drivers
