Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.209, 5.30mm Width) |
Number of Pins |
16 |
Supplier Device Package |
16-SOP |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LVX |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
JK Type |
Max Operating Temperature |
85°C |
Min Operating Temperature |
-40°C |
Voltage - Supply |
2V~3.6V |
Frequency |
150MHz |
Base Part Number |
74LVX112 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Number of Circuits |
2 |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
2V |
Number of Bits |
2 |
Clock Frequency |
150MHz |
Propagation Delay |
16.7 ns |
Turn On Delay Time |
8.5 ns |
Logic Function |
AND, Flip-Flop |
Current - Quiescent (Iq) |
2μA |
Current - Output High, Low |
4mA 4mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
15ns @ 3.3V, 50pF |
Trigger Type |
Negative Edge |
High Level Output Current |
-4mA |
Input Capacitance |
4pF |
Low Level Output Current |
4mA |
Number of Input Lines |
5 |
Number of Output Lines |
2 |
Clock Edge Trigger Type |
Negative Edge |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
74LVX112SJ Overview
As a result, it is packaged as 16-SOIC (0.209, 5.30mm Width). Package Tubeembeds it. T flip flop uses Differentialas its output configuration. Negative Edgeis the trigger it is configured with. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at a voltage of 2V~3.6V. It is operating at -40°C~85°C TA. JK Typeis the type of this D latch. It is a type of FPGA belonging to the 74LVX series. You should not exceed 150MHzin its output frequency. A total of 2elements are present in it. During its operation, it consumes 2μA quiescent energy. It is a member of the 74LVX112 family. Its input capacitance is 4pFfarads. It is mounted by the way of Surface Mount. With its 16pins, it is designed to work with most electronic flip flops. This device's clock edge trigger type is Negative Edge. An electronic part with 2bits has been designed. 2 circuits are used to achieve its superior flexibility. There are 2 output lines in this JK flip flop. As of now, there are 5input lines. The high level output current is set to -4mA. A 4mAvalue is set for low-level output current. A temperature below 85°Cshould be used for operation. Ideally, the operating temperature should be greater than -40°C. The system operates with a minimum supply voltage of 2V. It supports the maximal supply voltage of 3.6V. It is possible to achieve a frequency of 150MHz.
74LVX112SJ Features
Tube package
74LVX series
16 pins
2 Bits
74LVX112SJ Applications
There are a lot of ON Semiconductor 74LVX112SJ Flip Flops applications.
- ESD protection
- Synchronous counter
- 2 – Bit synchronous counter
- Modulo – n – counter
- Memory
- Shift registers
- Supports Live Insertion
- Buffered Clock
- Single Down Count-Control Line
- Count Modes