Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 2 days ago) |
Contact Plating |
Tin |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Number of Pins |
20 |
Weight |
801mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LVX |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
ECCN Code |
EAR99 |
Type |
D-Type |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Supply Voltage |
2.7V |
Base Part Number |
74LVX273 |
Function |
Master Reset |
Output Type |
Non-Inverted |
Operating Supply Voltage |
2.5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
2V |
Number of Channels |
8 |
Load Capacitance |
50pF |
Number of Bits |
8 |
Clock Frequency |
90MHz |
Propagation Delay |
20 ns |
Quiescent Current |
4μA |
Turn On Delay Time |
7.1 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
D-Type, Flip-Flop |
Current - Output High, Low |
4mA 4mA |
Max I(ol) |
0.004 A |
Max Propagation Delay @ V, Max CL |
14.5ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Input Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
50000000Hz |
Height |
2.34mm |
Length |
12.8mm |
Width |
7.47mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
74LVX273M Overview
The package is in the form of 20-SOIC (0.295, 7.50mm Width). Package Tubeembeds it. T flip flop uses Non-Invertedas the output. This trigger is configured to use Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 2V~3.6Vis used as the supply voltage. It is at -40°C~85°C TAdegrees Celsius that the system is operating. Logic flip flops of this type are classified as D-Type. It is a type of FPGA belonging to the 74LVX series. Its output frequency should not exceed 90MHz. The element count is 1 . The number of terminations is 20. Members of the 74LVX273family make up this object. An input voltage of 2.7Vpowers the D latch. There is 4pF input capacitance for this T flip flop. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. It is mounted by the way of Surface Mount. 20pins are included in its design. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. The flip flop is designed with 8bits. The supply voltage (Vsup) should be maintained above 2V for normal operation. In order to achieve high efficiency, the supply voltage should be maintained at 2.5V. The number of input lines is 3. There is a consumption of 4μAof quiescent current from it. There are 8 channels available.
74LVX273M Features
Tube package
74LVX series
20 pins
8 Bits
74LVX273M Applications
There are a lot of ON Semiconductor 74LVX273M Flip Flops applications.
- Test & Measurement
- CMOS Process
- ESD performance
- ESD protection
- ESCC
- QML qualified product
- Single Down Count-Control Line
- Memory
- Power down protection
- Computing