Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74LVX |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
MATTE TIN |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
JESD-30 Code |
R-PDSO-G20 |
Function |
Master Reset |
Qualification Status |
COMMERCIAL |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
3.6V |
Supply Voltage-Min (Vsup) |
2V |
Clock Frequency |
90MHz |
Family |
LV/LV-A/LVX/H |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
4mA 4mA |
Output Polarity |
TRUE |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
14.5ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Propagation Delay (tpd) |
24 ns |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
74LVX273SJ Overview
It is packaged in the way of 20-SOIC (0.209, 5.30mm Width). As part of the package Tube, it is embedded. This output is configured with Non-Inverted. Positive Edgeis the trigger it is configured with. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~3.6V volts. It is operating at -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. It belongs to the 74LVXseries of FPGAs. It should not exceed 90MHzin terms of its output frequency. In total, it contains 1 elements. It consumes 4μA of quiescent It has been determined that there have been 20 terminations. It is powered from a supply voltage of 2.7V. The input capacitance of this JK flip flopis 4pF farads. An electronic device belonging to the family LV/LV-A/LVX/Hcan be found here. As soon as 3.6Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be maintained above 2V for normal operation.
74LVX273SJ Features
Tube package
74LVX series
74LVX273SJ Applications
There are a lot of Rochester Electronics, LLC 74LVX273SJ Flip Flops applications.
- Modulo – n – counter
- ESD protection
- Safety Clamp
- Buffered Clock
- Single Up Count-Control Line
- Memory
- Shift registers
- Frequency Dividers
- QML qualified product
- Convert a momentary switch to a toggle switch