Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
20 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVX |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74LVX273 |
Function |
Master Reset |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Bits |
8 |
Clock Frequency |
90MHz |
Propagation Delay |
20.4 ns |
Turn On Delay Time |
9.6 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
4mA 4mA |
Max I(ol) |
0.004 A |
Max Propagation Delay @ V, Max CL |
14.5ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
fmax-Min |
75 MHz |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
50000000Hz |
Length |
6.5mm |
Width |
4.4mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
74LVX273TTR Overview
The item is packaged in 20-TSSOP (0.173, 4.40mm Width)cases. D flip flop is embedded in the Tape & Reel (TR) package. The output it is configured with uses Non-Inverted. The trigger configured with it uses Positive Edge. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at 2V~3.6Vvolts. In this case, the operating temperature is -55°C~125°C TA. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74LVXseries FPGA. Its output frequency should not exceed 90MHz Hz. In total, it contains 1 elements. There is a consumption of 4μAof quiescent energy. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. JK flip flop belongs to 74LVX273 family. Power is supplied from a voltage of 2.7V volts. Its input capacitance is 5pFfarads. The electronic device belongs to the LV/LV-A/LVX/Hfamily. In this case, the electronic component is mounted in the way of Surface Mount. This board is designed with 20pins on it. Its clock edge trigger type is Positive Edge. The part you are looking for is included in FF/Latches. 8bits are used in its design. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. The supply voltage (Vsup) should be maintained above 2V for normal operation. Despite its superior flexibility, it relies on 8 circuits to achieve it. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. The D latch operates on 3.3V volts.
74LVX273TTR Features
Tape & Reel (TR) package
74LVX series
20 pins
8 Bits
3.3V power supplies
74LVX273TTR Applications
There are a lot of STMicroelectronics 74LVX273TTR Flip Flops applications.
- Memory
- Convert a momentary switch to a toggle switch
- Registers
- Computers
- Bounce elimination switch
- Synchronous counter
- ESCC
- Computing
- Counters
- Matched Rise and Fall