74LVX74MTC
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 14 |
| Weight | 55.3mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 1999 |
| Series | 74LVX |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 2.7V |
| Base Part Number | 74LVX74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Clock Frequency | 85MHz |
| Propagation Delay | 19.1 ns |
| Quiescent Current | 2μA |
| Turn On Delay Time | 5.7 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Output High, Low | 4mA 4mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 13.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 4 |
| fmax-Min | 80 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 50000000Hz |
| Height | 900μm |
| Length | 5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LVX74MTC Overview
The flip flop is packaged in a case of 14-TSSOP (0.173, 4.40mm Width). D flip flop is included in the Tubepackage. Differentialis the output configured for it. This trigger uses the value Positive Edge. Surface Mountis positioned in the way of this electronic part. It operates with a supply voltage of 2V~3.6V. Currently, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. JK flip flop is a part of the 74LVXseries of FPGAs. A frequency of 85MHzshould not be exceeded by its output. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. JK flip flop belongs to 74LVX74 family. The power source is powered by 2.7V. This T flip flop has a capacitance of 4pF farads at the input. It belongs to the family of electronic devices known as LV/LV-A/LVX/H. It is mounted in the way of Surface Mount. With its 14pins, it is designed to work with most electronic flip flops. It has a clock edge trigger type of Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. As soon as 3.6Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be maintained above 2V for normal operation. Its superior flexibility is attributed to its use of 2 circuits. In order for the device to operate, it requires 3.3V power supplies. The number of input lines is 4. It consumes 2μA of quiescent current without being affected by external factors.
74LVX74MTC Features
Tube package
74LVX series
14 pins
3.3V power supplies
74LVX74MTC Applications
There are a lot of ON Semiconductor 74LVX74MTC Flip Flops applications.
- Load Control
- Control circuits
- Event Detectors
- High Performance Logic for test systems
- Communications
- Dynamic threshold performance
- Computing
- Guaranteed simultaneous switching noise level
- ESD protection
- 2 – Bit synchronous counter
