74LVX74SJ
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 14 |
| Weight | 218.3mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVX |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 2.7V |
| Base Part Number | 74LVX74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Clock Frequency | 85MHz |
| Propagation Delay | 18.5 ns |
| Turn On Delay Time | 5.7 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Current - Output High, Low | 4mA 4mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 13.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 4 |
| fmax-Min | 80 MHz |
| Clock Edge Trigger Type | Positive Edge |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
74LVX74SJ Overview
The flip flop is packaged in 14-SOIC (0.209, 5.30mm Width). The Tubepackage contains it. T flip flop uses Differentialas its output configuration. It is configured with a trigger that uses a value of Positive Edge. Surface Mountmounts this electrical part. Powered by a 2V~3.6Vvolt supply, it operates as follows. A temperature of -40°C~85°C TAis used in the operation. There is D-Type type of electronic flip flop associated with this device. This type of FPGA is a part of the 74LVX series. It should not exceed 85MHzin terms of its output frequency. It consumes 2μA of quiescent A total of 14 terminations have been made. Members of the 74LVX74family make up this object. The power supply voltage is 2.7V. Its input capacitance is 4pF farads. This D flip flop belongs to the family of LV/LV-A/LVX/H. There is an electronic part that is mounted in the way of Surface Mount. The 14pins are designed into the board. It has a clock edge trigger type of Positive Edge. Vsup reaches 3.6V, the maximal supply voltage. For normal operation, the supply voltage (Vsup) should be kept above 2V. To achieve this superior flexibility, 2 circuits are used. This input has 4lines in it.
74LVX74SJ Features
Tube package
74LVX series
14 pins
74LVX74SJ Applications
There are a lot of ON Semiconductor 74LVX74SJ Flip Flops applications.
- Divide a clock signal by 2 or 4
- Synchronous counter
- Count Modes
- 2 – Bit synchronous counter
- Memory
- ESD protection
- Test & Measurement
- Clock pulse
- Reduced system switching noise
- Balanced Propagation Delays
