74LVX74SJX
| Parameters | |
|---|---|
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2V |
| Clock Frequency | 85MHz |
| Propagation Delay | 18.5 ns |
| Turn On Delay Time | 5.7 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Current - Output High, Low | 4mA 4mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 13.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 4 |
| fmax-Min | 80 MHz |
| Clock Edge Trigger Type | Positive Edge |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 14 |
| Weight | 218.3mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVX |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 2.7V |
| Base Part Number | 74LVX74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 2 |
74LVX74SJX Overview
It is packaged in the way of 14-SOIC (0.209, 5.30mm Width). The Tape & Reel (TR)package contains it. T flip flop is configured with an output of Differential. This trigger is configured to use Positive Edge. There is an electric part mounted in the way of Surface Mount. A 2V~3.6Vsupply voltage is required for it to operate. A temperature of -40°C~85°C TAis considered to be the operating temperature. D-Typedescribes this flip flop. JK flip flop is a part of the 74LVXseries of FPGAs. This D flip flop should not have a frequency greater than 85MHz. A total of 2elements are contained within it. T flip flop consumes 2μA quiescent energy. Currently, there are 14 terminations. JK flip flop belongs to 74LVX74 family. It is powered by a voltage of 2.7V . Its input capacitance is 4pF farads. A device of this type belongs to the family of LV/LV-A/LVX/H. There is an electronic component mounted in the way of Surface Mount. This board has 14 pins. Its clock edge trigger type is Positive Edge. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2V. There are 4 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
74LVX74SJX Features
Tape & Reel (TR) package
74LVX series
14 pins
74LVX74SJX Applications
There are a lot of ON Semiconductor 74LVX74SJX Flip Flops applications.
- Clock pulse
- Circuit Design
- Safety Clamp
- Test & Measurement
- Registers
- Individual Asynchronous Resets
- Divide a clock signal by 2 or 4
- Shift registers
- Load Control
- Storage Registers
