74VHC74FT
| Parameters | |
|---|---|
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Clock Edge Trigger Type | Positive Edge |
| Length | 5mm |
| Width | 4.4mm |
| RoHS Status | RoHS Compliant |
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TSSOP (0.173, 4.40mm Width) |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2014 |
| Series | TC74VHC |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 2V |
| Clock Frequency | 115MHz |
| Propagation Delay | 9.3 ns |
| Quiescent Current | 2μA |
| Family | AHC/VHC/H/U/V |
| Logic Function | AND, D-Type |
| Current - Output High, Low | 8mA 8mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.3ns @ 5V, 50pF |
74VHC74FT Overview
In the form of 14-TSSOP (0.173, 4.40mm Width), it has been packaged. D flip flop is included in the Tape & Reel (TR)package. As configured, the output uses Differential. In the configuration of the trigger, Positive Edgeis used. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~5.5V. Currently, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. In terms of FPGAs, it belongs to the TC74VHC series. Its output frequency should not exceed 115MHz. A total of 2 elements are present. There have been 14 terminations. A voltage of 5V provides power to the D latch. A 4pFfarad input capacitance is provided by this T flip flop. Devices in the AHC/VHC/H/U/Vfamily are electronic devices. It is mounted by the way of Surface Mount. This device's clock edge trigger type is Positive Edge. There is a 5.5Vmaximum supply voltage (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2V. It consumes 2μA current.
74VHC74FT Features
Tape & Reel (TR) package
TC74VHC series
74VHC74FT Applications
There are a lot of Toshiba Semiconductor and Storage 74VHC74FT Flip Flops applications.
- Count Modes
- Clock pulse
- Patented noise
- Counters
- Divide a clock signal by 2 or 4
- Load Control
- 2 – Bit synchronous counter
- Event Detectors
- Frequency Divider circuits
- Differential Individual
