Parameters |
Factory Lead Time |
1 Week |
Package / Case |
288-TFBGA, CSPBGA |
Surface Mount |
YES |
Operating Temperature |
-40°C~100°C TJ |
Packaging |
Tray |
Published |
2013 |
Series |
SmartFusion® |
JESD-609 Code |
e0 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
288 |
Terminal Finish |
TIN LEAD SILVER |
HTS Code |
8542.39.00.01 |
Subcategory |
Field Programmable Gate Arrays |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
235 |
Supply Voltage |
1.5V |
Terminal Pitch |
0.5mm |
Frequency |
100MHz |
Time@Peak Reflow Temperature-Max (s) |
20 |
Base Part Number |
A2F200 |
JESD-30 Code |
S-PBGA-B288 |
Number of Outputs |
78 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
1.575V |
Power Supplies |
1.51.82.53.3V |
Supply Voltage-Min (Vsup) |
1.425V |
Interface |
EBI/EMI, Ethernet, I2C, SPI, UART, USART |
Number of I/O |
MCU - 31, FPGA - 78 |
RAM Size |
64KB |
Core Processor |
ARM® Cortex®-M3 |
Peripherals |
DMA, POR, WDT |
Connectivity |
EBI/EMI, Ethernet, I2C, SPI, UART/USART |
Architecture |
MCU, FPGA |
Number of Inputs |
78 |
Organization |
4608 CLBS, 200000 GATES |
Programmable Logic Type |
FIELD PROGRAMMABLE GATE ARRAY |
Core Architecture |
ARM |
Primary Attributes |
ProASIC®3 FPGA, 200K Gates, 4608 D-Flip-Flops |
Number of Equivalent Gates |
200000 |
Flash Size |
256KB |
Height Seated (Max) |
1.05mm |
Length |
11mm |
Width |
11mm |
RoHS Status |
Non-RoHS Compliant |
This SoC is built on ARM? Cortex?-M3 core processor(s).
A core processor ARM? Cortex?-M3 is used to build this SoC.The manufacturer assigns this system on a chip with a 288-TFBGA, CSPBGA package.With 64KB RAM implemented, this SoC chip provides users with reliable performance.The SoC design uses MCU, FPGA architecture for its internal architecture.SmartFusion? is the series number of this system on chip SoC.It is expected that this SoC meaning will operate at -40°C~100°C TJ on average.One important thing to mark down is that this SoC meaning combines ProASIC?3 FPGA, 200K Gates, 4608 D-Flip-Flops.It is packaged in a state-of-the-art Tray package.As a whole, this SoC part is comprised of MCU - 31, FPGA - 78 inputs and outputs.A 1.5V power supply should be used.In the SoCs wireless, voltages above 1.575V are considered unsafe.Power supplies of at least 1.425V are required.The configuration of FIELD PROGRAMMABLE GATE ARRAY can be adapted to meet the needs of different design projects.In total, there are 288 terminations, which makes system on a chip possible.In addition, it boasts impressive system on a chipming capabilities, just like other high-quality Field Programmable Gate Arrays.In order for this SoC chip to work properly, you can have 78 outputs.A power supply of 1.51.82.53.3V is required to run system on chip.The SoC chip offers 78 inputs.There is a flash of 256KB.By searching A2F200, you can find system on chips with similar specs and purposes.During operation, the wireless SoC runs at a frequency of 100MHz.In order to operate the SoC meaning, it must be based on the core architecture of ARM.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
256KB extended flash.
Core Architecture: ARM
There are a lot of Microsemi Corporation
A2F200M3F-1CS288I System On Chip (SoC) applications.
- Robotics
- Avionics
- Communication interfaces ( I2C, SPI )
- Digital Signal Processing
- Wireless sensor networks
- Wireless networking
- Networked sensors
- Three phase UPS
- Functional safety for critical applications in the automotive
- Servo drive control module