A2F200M3F-1FG256I
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Package / Case | 256-LBGA |
| Surface Mount | YES |
| Number of Pins | 256 |
| Operating Temperature | -40°C~100°C TJ |
| Packaging | Tray |
| Published | 2009 |
| Series | SmartFusion® |
| JESD-609 Code | e0 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 256 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Subcategory | Field Programmable Gate Arrays |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 1.5V |
| Terminal Pitch | 1mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 20 |
| Base Part Number | A2F200 |
| Number of Outputs | 66 |
| Supply Voltage-Max (Vsup) | 1.575V |
| Supply Voltage-Min (Vsup) | 1.425V |
| Interface | EBI/EMI, Ethernet, I2C, SPI, UART, USART |
| Operating Supply Current | 3mA |
| Number of I/O | MCU - 25, FPGA - 66 |
| RAM Size | 64KB |
| Core Processor | ARM® Cortex®-M3 |
| Peripherals | DMA, POR, WDT |
| Connectivity | EBI/EMI, Ethernet, I2C, SPI, UART/USART |
| Architecture | MCU, FPGA |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Core Architecture | ARM |
| Number of Gates | 200000 |
| Number of Logic Blocks (LABs) | 8 |
| Primary Attributes | ProASIC®3 FPGA, 200K Gates, 4608 D-Flip-Flops |
| Flash Size | 256KB |
| Height Seated (Max) | 1.7mm |
| Length | 17mm |
| Width | 17mm |
| Radiation Hardening | No |
| RoHS Status | Non-RoHS Compliant |
This SoC is built on ARM? Cortex?-M3 core processor(s).
A core processor ARM? Cortex?-M3 is embedded in this SoC.There is a 256-LBGA package assigned to this system on a chip by the manufacturer.The SoC chip provides users with reliable performance because it is implemented with 64KB RAM.Using the MCU, FPGA technique, this SoC design's internal architecture is simple.SmartFusion? is the series in which this system on chip SoC falls under.The average operating temps for this SoC meaning should be -40°C~100°C TJ.Taking note of the fact that this SoC security combines ProASIC?3 FPGA, 200K Gates, 4608 D-Flip-Flops is important.There is a state-of-the-art Tray package that houses this SoC system on a chip.Total I/Os on this SoC part are MCU - 25, FPGA - 66.A 1.5V power supply should be used.It is considered hazardous to operate the SoCs wireless with a voltage higher than 1.575V.In order to run it, it must be fed by at least 1.425V of power.The FIELD PROGRAMMABLE GATE ARRAY can be configured to meet different design requirements.In total, there are 256 terminations, which is great for system on a chip.In addition, it boasts impressive system on a chipming capabilities, just like other high-quality Field Programmable Gate Arrays.This SoC chip is capable of having 66 outputs, which is convenient.It has a 256KB flash.A2F200 can help you find system on chips with similar specs and purposes.A frequency of 100MHz is used by the wireless SoC to operate.Core architecture of ARM underpins the SoC meaning.The computer SoC is the 256-pin version.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
256KB extended flash.
Core Architecture: ARM
There are a lot of Microsemi Corporation
A2F200M3F-1FG256I System On Chip (SoC) applications.
- Robotics
- Measurement tools
- AC-input BLDC motor drive
- Transmitters
- Vending machines
- Special Issue Information
- Industrial Pressure
- Microcontroller
- ARM Cortex M4 microcontroller
- Mobile market
