A2F200M3F-1FG484I
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Package / Case | 484-BGA |
| Surface Mount | YES |
| Number of Pins | 484 |
| Operating Temperature | -40°C~100°C TJ |
| Packaging | Tray |
| Published | 2009 |
| Series | SmartFusion® |
| JESD-609 Code | e0 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 484 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Subcategory | Field Programmable Gate Arrays |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 1.5V |
| Terminal Pitch | 1mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 20 |
| Base Part Number | A2F200 |
| Number of Outputs | 94 |
| Supply Voltage-Max (Vsup) | 1.575V |
| Supply Voltage-Min (Vsup) | 1.425V |
| Interface | EBI/EMI, Ethernet, I2C, SPI, UART, USART |
| Operating Supply Current | 1mA |
| Number of I/O | MCU - 41, FPGA - 94 |
| RAM Size | 64KB |
| Core Processor | ARM® Cortex®-M3 |
| Peripherals | DMA, POR, WDT |
| Connectivity | EBI/EMI, Ethernet, I2C, SPI, UART/USART |
| Architecture | MCU, FPGA |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Core Architecture | ARM |
| Number of Gates | 200000 |
| Number of Logic Blocks (LABs) | 8 |
| Primary Attributes | ProASIC®3 FPGA, 200K Gates, 4608 D-Flip-Flops |
| Flash Size | 256KB |
| Height Seated (Max) | 2.44mm |
| Length | 23mm |
| Width | 23mm |
| Radiation Hardening | No |
| RoHS Status | Non-RoHS Compliant |
This SoC is built on ARM? Cortex?-M3 core processor(s).
There are ARM? Cortex?-M3 core processors in this SoC.The manufacturer assigns this system on a chip with a 484-BGA package.A SoC chip with 64KB RAM is provided for users to enjoy reliable performance.The internal architecture of this SoC design is based on the MCU, FPGA technique.The SmartFusion? series contains this system on chip SoC.This SoC meaning should have an average operating temperature of -40°C~100°C TJ when it is operating normally.A key point to note is that this SoC security combines ProASIC?3 FPGA, 200K Gates, 4608 D-Flip-Flops.It comes in a state-of-the-art Tray package.This SoC part contains a total of MCU - 41, FPGA - 94 I/Os in total.For safe operation, it is advisable to utilize a power supply with 1.5V voltage.The SoCs wireless is considered unreliable if the voltage exceeds 1.575V.Power supply should be at least 1.425V.In order to cater to different design requirements, FIELD PROGRAMMABLE GATE ARRAY can be reconfigured to serve different needs.A system on a chip benefits from having 484 terminations.In the same way that other high-quality Field Programmable Gate Arrays will do, it is also capable of providing outstanding performance.The SoC chip that comes with this module can be configured to have 94 outputs.It has a 256KB flash.It is possible to find system on chips that are similar in specs and purpose by searching for A2F200.The wireless SoC works at a frequency of 100MHz.There are a number of features to this SoC meaning which are based on the core architecture of ARM.Currently, the computer SoC is available in a 484-pin version.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
256KB extended flash.
Core Architecture: ARM
There are a lot of Microsemi Corporation
A2F200M3F-1FG484I System On Chip (SoC) applications.
- Flow Sensors
- Medical
- Remote control
- Microprocessors
- Microcontroller based SoC ( RISC-V, ARM)
- Microcontroller
- Three phase UPS
- Temperature
- Vending machines
- Industrial sectors
