A2F500M3G-CSG288
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Package / Case | 288-TFBGA, CSPBGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~85°C TJ |
| Packaging | Tray |
| Published | 2015 |
| Series | SmartFusion® |
| JESD-609 Code | e1 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 288 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| HTS Code | 8542.39.00.01 |
| Subcategory | Field Programmable Gate Arrays |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.5V |
| Terminal Pitch | 0.5mm |
| Frequency | 80MHz |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | A2F500M3G |
| JESD-30 Code | S-PBGA-B288 |
| Number of Outputs | 78 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 1.575V |
| Power Supplies | 1.51.82.53.3V |
| Supply Voltage-Min (Vsup) | 1.425V |
| Interface | EBI/EMI, Ethernet, I2C, SPI, UART, USART |
| Number of I/O | MCU - 31, FPGA - 78 |
| RAM Size | 64KB |
| Core Processor | ARM® Cortex®-M3 |
| Peripherals | DMA, POR, WDT |
| Connectivity | EBI/EMI, Ethernet, I2C, SPI, UART/USART |
| Architecture | MCU, FPGA |
| Number of Inputs | 78 |
| Organization | 11520 CLBS, 500000 GATES |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Core Architecture | ARM |
| Primary Attributes | ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops |
| Number of Equivalent Gates | 500000 |
| Flash Size | 512KB |
| Height Seated (Max) | 1.05mm |
| Length | 11mm |
| Width | 11mm |
| RoHS Status | RoHS Compliant |
This SoC is built on ARM? Cortex?-M3 core processor(s).
On this SoC, there is ARM? Cortex?-M3 core processor.Its package is 288-TFBGA, CSPBGA.The 64KB RAM implementation of this SoC chip ensures efficient performance for users.The internal architecture of this SoC design is based on the MCU, FPGA technique.The system on a chip is part of the series SmartFusion?.For this SoC meaning, the average operating temperature should be 0°C~85°C TJ.In addition, this SoC security combines ProASIC?3 FPGA, 500K Gates, 11520 D-Flip-Flops.It comes in a state-of-the-art Tray package.MCU - 31, FPGA - 78 I/Os are included in this SoC part.A 1.5V power supply is recommended.In the SoCs wireless, voltages above 1.575V are considered unsafe.Power supplies of at least 1.425V are required.Different designing requirements can be met with FIELD PROGRAMMABLE GATE ARRAY.In total, there are 288 terminations, which makes system on a chip possible.Likewise, it has a remarkable system on a chip capability, just like other high-quality Field Programmable Gate Arrays.In order for this SoC chip to work properly, you can have 78 outputs.A power supply of 1.51.82.53.3V is required to run system on chip.There are 78 inputs available on the SoC chip.There is a flash of 512KB.It is possible to find system on chips that are similar in specs and purpose by searching for A2F500M3G.At 80MHz, the wireless SoC works.It uses ARM as its core architecture.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
512KB extended flash.
Core Architecture: ARM
There are a lot of Microsemi Corporation
A2F500M3G-CSG288 System On Chip (SoC) applications.
- Mouse
- Multiprocessor system-on-chips (MPSoCs)
- Microcontroller
- RISC-V
- Wireless sensor networks
- Keywords
- Networked sensors
- POS Terminals
- Functional safety for critical applications in the aerospace
- Healthcare
