A2F500M3G-FG256I
| Parameters | |
|---|---|
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 1.575V |
| Power Supplies | 1.51.82.53.3V |
| Supply Voltage-Min (Vsup) | 1.425V |
| Interface | EBI/EMI, Ethernet, I2C, SPI, UART, USART |
| Operating Supply Current | 2mA |
| Number of I/O | MCU - 25, FPGA - 66 |
| RAM Size | 64KB |
| Core Processor | ARM® Cortex®-M3 |
| Peripherals | DMA, POR, WDT |
| Connectivity | EBI/EMI, Ethernet, I2C, SPI, UART/USART |
| Architecture | MCU, FPGA |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Core Architecture | ARM |
| Number of Gates | 500000 |
| Number of Logic Blocks (LABs) | 24 |
| Primary Attributes | ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops |
| Flash Size | 512KB |
| Height Seated (Max) | 1.7mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | Non-RoHS Compliant |
| Factory Lead Time | 1 Week |
| Package / Case | 256-LBGA |
| Surface Mount | YES |
| Number of Pins | 256 |
| Operating Temperature | -40°C~100°C TJ |
| Packaging | Tray |
| Published | 2015 |
| Series | SmartFusion® |
| JESD-609 Code | e0 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 256 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| HTS Code | 8542.39.00.01 |
| Subcategory | Field Programmable Gate Arrays |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 1.5V |
| Terminal Pitch | 1mm |
| Frequency | 80MHz |
| Time@Peak Reflow Temperature-Max (s) | 20 |
| Base Part Number | A2F500M3G |
| Number of Outputs | 66 |
This SoC is built on ARM? Cortex?-M3 core processor(s).
Based on the core processor(s) ARM? Cortex?-M3, this SoC has been developed.It has been assigned a package 256-LBGA by its manufacturer for this system on a chip.The 64KB RAM implementation of this SoC chip ensures efficient performance for users.Internally, this SoC design uses the MCU, FPGA technique.It is a member of the SmartFusion? series.This SoC meaning should have an average operating temperature of -40°C~100°C TJ when it is operating normally.A significant feature of this SoC security is the combination of ProASIC?3 FPGA, 500K Gates, 11520 D-Flip-Flops.In the state-of-the-art Tray package, this SoC system on a chip is housed.MCU - 25, FPGA - 66 I/Os in total are included in this SoC part.Ideally, a power supply with a voltage of 1.5V should be used.It is considered hazardous to operate the SoCs wireless with a voltage higher than 1.575V.There is a possibility that it can be powered by a power supply of at least 1.425V.The configuration of FIELD PROGRAMMABLE GATE ARRAY can be adapted to meet the needs of different design projects.In total, there are 256 terminations, which makes system on a chip possible.The system on a chip capability is outstanding just like it is for other high-quality Field Programmable Gate Arrays.A SoC chip like this can have 66 outputs.There is 1.51.82.53.3V power supply required for system on chip.There is a flash of 512KB on it.It is possible to find system on chips that are similar in specs and purpose by searching for A2F500M3G.During operation, the wireless SoC runs at a frequency of 80MHz.In this SoC meaning, ARM serves as the core architecture.The computer SoC has a pin count of 256.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
512KB extended flash.
Core Architecture: ARM
There are a lot of Microsemi Corporation
A2F500M3G-FG256I System On Chip (SoC) applications.
- Samsung galaxy gear
- Avionics
- Automotive gateway
- Communication interfaces ( I2C, SPI )
- RISC-V
- Automated sorting equipment
- Mouse
- ARM
- Published Paper
- Special Issue Editors
