A2F500M3G-FG256M
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Package / Case | 256-LBGA |
| Surface Mount | YES |
| Number of Pins | 256 |
| Operating Temperature | -55°C~125°C TJ |
| Packaging | Tray |
| Series | SmartFusion® |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 256 |
| HTS Code | 8542.39.00.01 |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Supply Voltage | 1.5V |
| Terminal Pitch | 1mm |
| Reach Compliance Code | unknown |
| Frequency | 80MHz |
| Base Part Number | A2F500M3G |
| Number of Outputs | 66 |
| Supply Voltage-Max (Vsup) | 1.575V |
| Supply Voltage-Min (Vsup) | 1.425V |
| Interface | EBI/EMI, Ethernet, I2C, SPI, UART, USART |
| Number of I/O | MCU - 25, FPGA - 66 |
| RAM Size | 64KB |
| Core Processor | ARM® Cortex®-M3 |
| Peripherals | DMA, POR, WDT |
| Connectivity | EBI/EMI, Ethernet, I2C, SPI, UART/USART |
| Architecture | MCU, FPGA |
| Organization | 11520 CLBS, 500000 GATES |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Core Architecture | ARM |
| Primary Attributes | ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops |
| Number of Equivalent Gates | 500000 |
| Flash Size | 512KB |
| Height Seated (Max) | 1.7mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | Non-RoHS Compliant |
This SoC is built on ARM? Cortex?-M3 core processor(s).
A core processor ARM? Cortex?-M3 is used to build this SoC.Its package is 256-LBGA.A SoC chip with 64KB RAM is provided for users to enjoy reliable performance.The SoC design uses MCU, FPGA architecture for its internal architecture.SmartFusion? is the series name of this system on chip SoC.Temperatures should be -55°C~125°C TJ on average for this SoC meaning.A significant feature of this SoC security is the combination of ProASIC?3 FPGA, 500K Gates, 11520 D-Flip-Flops.In the state-of-the-art Tray package, this SoC system on a chip is housed.As a whole, this SoC part is comprised of MCU - 25, FPGA - 66 inputs and outputs.Ideally, a power supply with a voltage of 1.5V should be used.An excessive voltage of 1.575V is considered unsafe for the SoCs wireless, so voltages higher than that are not allowed.Power supplies of at least 1.425V are required.You can reconfigure FIELD PROGRAMMABLE GATE ARRAY to meet your specific design needs.A system on a chip benefits from having 256 terminations.It is possible to use this SoC chip with 66 outputs.This flash has a size of 512KB.Searching A2F500M3G will bring up system on chips with similar specs and purposes.It operates at a frequency of 80MHz.It uses ARM as its core architecture.This is the version with 256 pins.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
512KB extended flash.
Core Architecture: ARM
There are a lot of Microsemi Corporation
A2F500M3G-FG256M System On Chip (SoC) applications.
- Deep learning hardware
- Functional safety for critical applications in the automotive
- Smartphones
- Transmitters
- AC drive control module
- POS Terminals
- Sports
- Networked Media Encode/Decode
- Smart appliances
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