A2F500M3G-FG484M
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Package / Case | 484-BGA |
| Surface Mount | YES |
| Operating Temperature | -55°C~125°C TJ |
| Packaging | Tray |
| Series | SmartFusion® |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 484 |
| ECCN Code | 3A001.A.2.C |
| HTS Code | 8542.39.00.01 |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.5V |
| Terminal Pitch | 1mm |
| Frequency | 80MHz |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | A2F500M3G |
| JESD-30 Code | S-PBGA-B484 |
| Supply Voltage-Max (Vsup) | 1.575V |
| Supply Voltage-Min (Vsup) | 1.425V |
| Interface | EBI/EMI, Ethernet, I2C, SPI, UART, USART |
| Number of I/O | MCU - 41, FPGA - 128 |
| RAM Size | 64KB |
| Core Processor | ARM® Cortex®-M3 |
| Peripherals | DMA, POR, WDT |
| Connectivity | EBI/EMI, Ethernet, I2C, SPI, UART/USART |
| Architecture | MCU, FPGA |
| Organization | 11520 CLBS, 500000 GATES |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Core Architecture | ARM |
| Primary Attributes | ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops |
| Number of Equivalent Gates | 500000 |
| Flash Size | 512KB |
| Height Seated (Max) | 2.44mm |
| Length | 23mm |
| Width | 23mm |
| RoHS Status | Non-RoHS Compliant |
This SoC is built on ARM? Cortex?-M3 core processor(s).
A core processor(s) ARM? Cortex?-M3 is integrated into this SoC.There is a 484-BGA package assigned to this system on a chip by the manufacturer.As this SoC chip has 64KB RAM implemented, it provides reliable performance to its users.The internal architecture of this SoC design is based on the MCU, FPGA technique.Featured system on chip SoCs of the SmartFusion? series.Temperatures should be -55°C~125°C TJ on average for this SoC meaning.A significant feature of this SoC security is the combination of ProASIC?3 FPGA, 500K Gates, 11520 D-Flip-Flops.In the state-of-the-art Tray package, this SoC system on a chip is housed.An integral part of this SoC consists of a total of MCU - 41, FPGA - 128 I/Os.Ideally, a power supply with a voltage of 1.5V should be used.In the SoCs wireless, voltages above 1.575V are considered unsafe.If it has at least a 1.425V volt power supply, it can work fine.You can reconfigure FIELD PROGRAMMABLE GATE ARRAY to meet your specific design needs.A system on a chip benefits from having 484 terminations.A 512KB flash can be seen on it.A2F500M3G can help you find system on chips with similar specs and purposes.A frequency of 80MHz is used by the wireless SoC to operate.This SoC meaning utilizes a core architecture of ARM as its foundation.
ARM? Cortex?-M3 processor.
64KB RAM.
Built on MCU, FPGA.
512KB extended flash.
Core Architecture: ARM
There are a lot of Microsemi Corporation
A2F500M3G-FG484M System On Chip (SoC) applications.
- Flow Sensors
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