ADCLK946BCPZ
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | PRODUCTION (Last Updated: 1 week ago) |
| Contact Plating | Tin |
| Mounting Type | Surface Mount |
| Package / Case | 24-VFQFN Exposed Pad, CSP |
| Surface Mount | YES |
| Number of Pins | 24 |
| Operating Temperature | -40°C~85°C |
| Packaging | Tray |
| Series | SiGe |
| JESD-609 Code | e3 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 24 |
| ECCN Code | EAR99 |
| Type | Fanout Buffer (Distribution) |
| Subcategory | Clock Drivers |
| Technology | BIPOLAR |
| Voltage - Supply | 2.97V~3.63V |
| Terminal Position | QUAD |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Frequency | 4.8GHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | ADCLK946 |
| Output | LVPECL |
| Pin Count | 24 |
| Number of Outputs | 6 |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2.97V |
| Interface | Parallel, Serial |
| Number of Circuits | 1 |
| Nominal Supply Current | 245mA |
| Max Supply Current | 275mA |
| Propagation Delay | 220 ps |
| Turn On Delay Time | 220 ps |
| Family | 946 |
| Input | CML, CMOS, LVDS, LVPECL |
| Ratio - Input:Output | 1:6 |
| Differential - Input:Output | Yes/Yes |
| Prop. Delay@Nom-Sup | 0.22 ns |
| Same Edge Skew-Max (tskwd) | 0.28 ns |
| Height | 1mm |
| Length | 4mm |
| Width | 4mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
ADCLK946BCPZ Overview
24-VFQFN Exposed Pad, CSP case is available for the cut smart buffer. It is packaged as a Tray. There are 24 terminations in it. With a supply voltage of 3.3V, it is possible to achieve a high level of efficiency. It's?set?up?in?the?way?of?Surface Mount. There is a classification of Fanout Buffer (Distribution) for this electronic part. It is recommended to set the temperature to -40°C~85°C so the system can perform reliably. This circuit clock should be able to operate on a power supply of 2.97V~3.63V volts. A pin count of 24 can be found on it. As a result, the output is LVPECL. A 24 pin is used for operation. The structure belongs to the ADCLK946 family of structures. A cut smart buffer of this type is contained in Clock Drivers. The buffer IC belongs to the 946 family. The supply voltage (Vsup) should be maintained above 2.97V in order for the clock divider to operate normally. As a default, it is set to output 6 by default. A supply of 3.3V volts is needed to power it. It is part of the SiGe series of electrical components. It maintains excellent accuracy at a frequency of 4.8GHz.
ADCLK946BCPZ Features
24 terminations
The operating temperature of -40°C~85°C degrees
Clock Drivers subcategory
at 4.8GHz frequency
ADCLK946BCPZ Applications
There are a lot of Analog Devices Inc. ADCLK946BCPZ Clock Buffers & Drivers applications.
- Storage area network
- OTN
- Big data
- FPGA
- Aviation
- Host bus adapter card
- Clock signal duplication
- Measurement test
- Mass storage system
- Clock signal format conversion
