AM3351BZCE30
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Package / Case | 289-LFBGA |
| Surface Mount | YES |
| Number of Pins | 298 |
| Operating Temperature | 0°C~90°C TJ |
| Packaging | Tray |
| Series | Sitara™ |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 298 |
| ECCN Code | 5A992C |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.1V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | AM3351 |
| Supply Voltage-Max (Vsup) | 1.144V |
| Supply Voltage-Min (Vsup) | 1.056V |
| Speed | 300MHz |
| uPs/uCs/Peripheral ICs Type | MICROPROCESSOR, RISC |
| Core Processor | ARM® Cortex®-A8 |
| Clock Frequency | 26MHz |
| Supply Current-Max | 400mA |
| Bit Size | 32 |
| Boundary Scan | YES |
| Low Power Mode | YES |
| Format | FIXED POINT |
| Integrated Cache | YES |
| RAM (words) | 131072 |
| Voltage - I/O | 1.8V 3.3V |
| Ethernet | 10/100/1000Mbps (1) |
| Number of Cores/Bus Width | 1 Core 32-Bit |
| Graphics Acceleration | Yes |
| RAM Controllers | LPDDR, DDR2, DDR3, DDR3L |
| USB | USB 2.0 + PHY (1) |
| Additional Interfaces | I2C, McASP, McSPI, MMC/SD/SDIO, UART |
| Co-Processors/DSP | Multimedia; NEON™ SIMD |
| Security Features | Cryptography, Random Number Generator |
| Display & Interface Controllers | LCD, Touchscreen |
| Number of DMA Channels | 64 |
| Height | 1.3mm |
| Length | 13mm |
| Width | 13mm |
| Thickness | 890μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
AM3351BZCE30 Description
The AM3351BZCE30 microprocessor, based on the ARM Cortex-A8 processor, is enhanced with image, graphics processing, peripherals, and industrial interface options such as EtherCAT and PROFIBUS. The AM3351BZCE30 supports high-level operating systems (HLOS). Processor SDK Linux? and TI-RTOS are available free of charge from TI. The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX? Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects.
AM3351BZCE30 Features
Up to 1-GHz Sitara? ARM? Cortex?-A8 32?Bit RISC Processor
64KB of General-Purpose On-Chip Memory Controller (OCMC) RAM
Accessible to All Masters
Supports Retention for Fast Wakeup
12KB of Shared RAM With Single-Error Detection (Parity)
Three 120-Byte Register Banks Accessible by Each PRU
AM3351BZCE30 Applications
Gaming Peripherals
Home and Industrial Automation
Consumer Medical Appliances
Printers
Smart Toll Systems
Connected Vending Machines
Weighing Scales
Educational Consoles
Advanced Toys
