Parameters |
Mount |
Through Hole |
Package / Case |
PDIP |
Number of Pins |
24 |
JESD-609 Code |
e0 |
Moisture Sensitivity Level (MSL) |
1 |
Number of Terminations |
24 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
NO |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
225 |
Supply Voltage |
5V |
Terminal Pitch |
2.54mm |
Frequency |
71MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
24 |
Qualification Status |
Not Qualified |
Power Supplies |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
10 |
Memory Type |
EEPROM |
Propagation Delay |
15 ns |
Turn On Delay Time |
15 ns |
Frequency (Max) |
71MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
750 |
Number of Programmable I/O |
20 |
Output Function |
MACROCELL |
Number of Macro Cells |
10 |
JTAG BST |
NO |
Number of Dedicated Inputs |
11 |
In-System Programmable |
NO |
Height Seated (Max) |
5.334mm |
Length |
31.877mm |
Width |
7.62mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
ATF750CL-15PC Overview
In the mobile phone network, there are 10macro cells, which are cells with high-power antennas and towers.PDIPis the package in which it resides.This device has 10 I/O ports programmed into it.The termination of a device is set to [0].This electrical component has a terminal position of 0.There is 5V voltage supply for this device.This part is included in Programmable Logic Devices.24pins are programmed on the chip.When using this device, NOis also available.750gates are used to construct digital circuits.Data storage is performed using [0].A Through Holeis mounted on this electronic component.This board has 24 pins.A voltage of 5.25V is the maximum supply voltage for this device.A minimum supply voltage of 4.75V is required for it to operate.It runs on a voltage of 5Vvolts.In total, there are 20programmable I/Os.This frequency is 71MHz.It is recommended that the operating temperature exceed 0°C.Temperatures should be lower than 70°C when operating.There are 11 dedicated inputs used to detect the status of input signals.There should be a lower maximum frequency than 71MHz.This kind of FPGA is composed of EE PLD.
ATF750CL-15PC Features
PDIP package
10 I/Os
24 pin count
24 pins
5V power supplies
ATF750CL-15PC Applications
There are a lot of Atmel (Microchip Technology) ATF750CL-15PC CPLDs applications.
- PULSE WIDTH MODULATION (PWM)
- Auxiliary Power Supply Isolated and Non-isolated
- D/T registers and latches
- Field programmable gate
- Complex programmable logic devices
- ToR/Aggregation/Core Switch and Router
- Handheld digital devices
- Parity generators
- Digital designs
- I2C BUS INTERFACE