Parameters |
Package / Case |
CDIP |
Surface Mount |
NO |
JESD-609 Code |
e0 |
Number of Terminations |
24 |
ECCN Code |
3A001.A.2.C |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
125°C |
Min Operating Temperature |
-55°C |
Additional Feature |
10 MACROCELLS; VARIABLE PRODUCT TERMS |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
DUAL |
Terminal Form |
THROUGH-HOLE |
Supply Voltage |
5V |
Terminal Pitch |
2.54mm |
Pin Count |
24 |
JESD-30 Code |
R-GDIP-T24 |
Operating Supply Voltage |
5V |
Power Supplies |
5V |
Temperature Grade |
MILITARY |
Number of I/O |
10 |
Memory Type |
EPROM |
Clock Frequency |
55MHz |
Propagation Delay |
20 ns |
Organization |
12 DEDICATED INPUTS, 10 I/O |
Programmable Logic Type |
OT PLD |
Screening Level |
MIL-STD-883 |
Speed Grade |
20 |
Output Function |
MACROCELL |
Number of Macro Cells |
10 |
JTAG BST |
NO |
Number of Dedicated Inputs |
12 |
In-System Programmable |
NO |
Height Seated (Max) |
5.08mm |
Length |
32mm |
Width |
7.62mm |
Radiation Hardening |
No |
RoHS Status |
Non-RoHS Compliant |
ATV750-20GM883 Overview
There are 10 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).The item is packaged with CDIP.There are 10 I/Os programmed in it.Devices are programmed with terminations of [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.It is powered by a voltage of 5V volts.There is a part included in Programmable Logic Devices.Chips are programmed with 24 pins.Additionally, this device is capable of displaying [0].It is recommended that the supply voltage be kept at 5Vto maximize efficiency.It is recommended to store data in [0].It operates from 5V power supplies.Ideally, the operating temperature should be greater than -55°C.A temperature below 125°Cshould be used as the operating temperature.Input signals are detected using 12dedicated inputs.The clock frequency should not exceed 55MHz.A programmable logic type is categorized as OT PLD.
ATV750-20GM883 Features
CDIP package
10 I/Os
24 pin count
5V power supplies
ATV750-20GM883 Applications
There are a lot of Atmel (Microchip Technology) ATV750-20GM883 CPLDs applications.
- Power Meter SMPS
- Handheld digital devices
- Custom state machines
- I/O PORTS (MCU MODULE)
- Random logic replacement
- State machine control
- Complex programmable logic devices
- Storage Cards and Storage Racks
- ON-CHIP OSCILLATOR CIRCUIT
- I/O expansion