Parameters |
Current - Output High, Low |
6.8mA 6.8mA |
Max I(ol) |
0.0068 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
90ns @ 15V, 50pF |
Prop. Delay@Nom-Sup |
300 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Power Supply Current-Max (ICC) |
0.06mA |
Number of Output Lines |
1 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
3500000Hz |
Height |
1.2mm |
Length |
5mm |
Width |
4.4mm |
Thickness |
1mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 5 days ago) |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
14 |
Weight |
57.209338mg |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tube |
Series |
4000B |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
ECCN Code |
EAR99 |
Type |
D-Type |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
3V~18V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Base Part Number |
CD4013 |
Function |
Set(Preset) and Reset |
Number of Outputs |
4 |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
3V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
6.8mA |
Clock Frequency |
24MHz |
Propagation Delay |
400 ns |
Quiescent Current |
20μA |
Turn On Delay Time |
45 ns |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
CD4013BPW Overview
It is packaged in the way of 14-TSSOP (0.173, 4.40mm Width). A package named Tubeincludes it. In the configuration, Differentialis used as the output. This trigger is configured to use Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at 3V~18Vvolts. A temperature of -55°C~125°C TAis used in the operation. It is an electronic flip flop with the type D-Type. The FPGA belongs to the 4000B series. This D flip flop should not have a frequency greater than 24MHz. As a result, it consumes 4μA quiescent current and is not affected by external forces. 14terminations have occurred. It is a member of the CD4013 family. An input voltage of 5Vpowers the D latch. JK flip flop input capacitance is 5pF farads. There is an electronic part that is mounted in the way of Surface Mount. This board has 14 pins. There is a clock edge trigger type of Positive Edgeon this device. There is a FF/Latchesbase part number assigned to the RS flip flops. Normally, the supply voltage (Vsup) should be above 3V. 2 circuits are used to achieve its superior flexibility. With an output current of 6.8mA, this device offers maximum design flexibility. The JK flip flop is with 1 output lines to operate. There is a consumption of 20μAof quiescent current from it.
CD4013BPW Features
Tube package
4000B series
14 pins
CD4013BPW Applications
There are a lot of Texas Instruments CD4013BPW Flip Flops applications.
- Consumer
- Frequency division
- ESD performance
- Digital electronics systems
- Frequency Dividers
- Common Clocks
- Memory
- Data Synchronizers
- Shift registers
- Guaranteed simultaneous switching noise level