CD4027BPW
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 16 |
| Weight | 61.887009mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 4000B |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 3V~18V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | CD4027 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 6.8mA |
| Clock Frequency | 24MHz |
| Propagation Delay | 300 ns |
| Quiescent Current | 20μA |
| Turn On Delay Time | 45 ns |
| Logic Function | AND, D-Type |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 6.8mA 6.8mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 90ns @ 15V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Power Supply Current-Max (ICC) | 0.06mA |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 3500000Hz |
| Height | 1.2mm |
| Length | 5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD4027BPW Overview
The flip flop is packaged in 16-TSSOP (0.173, 4.40mm Width). It is contained within the Tubepackage. T flip flop uses Differentialas its output configuration. The trigger configured with it uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 3V~18Vis used as the supply voltage. A temperature of -55°C~125°C TAis considered to be the operating temperature. It is an electronic flip flop with the type JK Type. JK flip flop is a part of the 4000Bseries of FPGAs. You should not exceed 24MHzin the output frequency of the device. As a result, it consumes 4μA quiescent current and is not affected by external forces. The number of terminations is 16. The CD4027 family contains this object. A voltage of 5V provides power to the D latch. The input capacitance of this JK flip flopis 5pF farads. There is an electronic part that is mounted in the way of Surface Mount. The 16pins are designed into the board. A Positive Edgeclock edge trigger is used in this device. It is part of the FF/Latchesbase part number family. A normal operating voltage (Vsup) should remain above 3V. The superior flexibility of this product is achieved by using 2 circuits. This T flip flop features a maximum design flexibility due to its output current of 6.8mA. There is 20μA quiescent current consumption by it.
CD4027BPW Features
Tube package
4000B series
16 pins
CD4027BPW Applications
There are a lot of Texas Instruments CD4027BPW Flip Flops applications.
- Buffered Clock
- Count Modes
- Convert a momentary switch to a toggle switch
- QML qualified product
- Frequency division
- Cold spare funcion
- EMI reduction circuitry
- Registers
- Shift Registers
- Balanced 24 mA output drivers
