CD74AC109E
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Contact Plating | Gold |
| Mount | Through Hole |
| Mounting Type | Through Hole |
| Package / Case | 16-DIP (0.300, 7.62mm) |
| Number of Pins | 16 |
| Weight | 951.693491mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74AC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1.5V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AC109 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3/5V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 100MHz |
| Propagation Delay | 129 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 2.6 ns |
| Family | AC |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 10.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Positive Edge |
| Height | 5.08mm |
| Length | 19.3mm |
| Width | 6.35mm |
| Thickness | 3.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74AC109E Overview
The flip flop is packaged in 16-DIP (0.300, 7.62mm). Package Tubeembeds it. Differentialis the output configured for it. The trigger configured with it uses Positive Edge. It is mounted in the way of Through Hole. The supply voltage is set to 1.5V~5.5V. It is operating at a temperature of -55°C~125°C TA. JK Typeis the type of this D latch. It is a type of FPGA belonging to the 74AC series. You should not exceed 100MHzin its output frequency. There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. D latch belongs to the 74AC109 family. A voltage of 3.3V is used as the power supply for this D latch. Input capacitance of this device is 10pF farads. Electronic devices of this type belong to the ACfamily. There is an electronic part that is mounted in the way of Through Hole. Basically, it is designed with a set of 16 pins. There is a clock edge trigger type of Positive Edgeon this device. There is a FF/Latchesbase part number assigned to the RS flip flops. There is a 5.5Vmaximum supply voltage (Vsup). Its flexibility is enhanced by 2 circuits. An electrical current of 3.3/5V volts is applied to it. With an output current of 24mA, this device offers maximum design flexibility. 4μAquiescent current consumed.
CD74AC109E Features
Tube package
74AC series
16 pins
3.3/5V power supplies
CD74AC109E Applications
There are a lot of Texas Instruments CD74AC109E Flip Flops applications.
- Differential Individual
- Buffer registers
- QML qualified product
- Data Synchronizers
- Shift registers
- Divide a clock signal by 2 or 4
- Frequency division
- Parallel data storage
- Memory
- Bus hold
