CD74AC109M96
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74AC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Base Part Number | 74AC109 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3/5V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 100MHz |
| Propagation Delay | 10.3 ns |
| Turn On Delay Time | 2.6 ns |
| Family | AC |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 10.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74AC109M96 Overview
The flip flop is packaged in a case of 16-SOIC (0.154, 3.90mm Width). As part of the package Cut Tape (CT), it is embedded. T flip flop is configured with an output of Differential. There is a trigger configured with Positive Edge. It is mounted in the way of Surface Mount. The supply voltage is set to 1.5V~5.5V. A temperature of -55°C~125°C TAis considered to be the operating temperature. JK Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74ACseries FPGA. Its output frequency should not exceed 100MHz. During its operation, it consumes 4μA quiescent energy. A total of 16 terminations have been made. D latch belongs to the 74AC109 family. The power supply voltage is 3.3V. This T flip flop has a capacitance of 10pF farads at the input. In this case, the D flip flop belongs to the ACfamily. There is an electronic part that is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 16. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. Vsup reaches its maximum value at 5.5V. Using 2 circuits, it is highly flexible. Considering its reliability, this T flip flop is well suited for TR. In order for the device to operate, it requires 3.3/5V power supplies. Its output current of 24mAallows for maximum design flexibility.
CD74AC109M96 Features
Cut Tape (CT) package
74AC series
16 pins
3.3/5V power supplies
CD74AC109M96 Applications
There are a lot of Texas Instruments CD74AC109M96 Flip Flops applications.
- Test & Measurement
- Instrumentation
- Shift registers
- Balanced 24 mA output drivers
- Latch
- Divide a clock signal by 2 or 4
- Automotive
- Consumer
- Data transfer
- Asynchronous counter
