CD74AC112E
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Contact Plating | Gold |
| Mount | Through Hole |
| Mounting Type | Through Hole |
| Package / Case | 16-DIP (0.300, 7.62mm) |
| Number of Pins | 16 |
| Weight | 951.693491mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74AC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Subcategory | FF/Latch |
| Technology | CMOS |
| Voltage - Supply | 1.5V~5.5V |
| Terminal Position | DUAL |
| Supply Voltage | 3.3V |
| Base Part Number | 74AC112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3/5V |
| Number of Channels | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 100MHz |
| Propagation Delay | 129 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 2.6 ns |
| Family | AC |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 10.3ns @ 5V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 10pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Clock Edge Trigger Type | Negative Edge |
| Height | 5.08mm |
| Length | 19.3mm |
| Width | 6.35mm |
| Thickness | 3.9mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74AC112E Overview
It is packaged in the way of 16-DIP (0.300, 7.62mm). As part of the package Tube, it is embedded. Differentialis the output configured for it. In the configuration of the trigger, Negative Edgeis used. Through Holeis positioned in the way of this electronic part. The JK flip flop operates at a voltage of 1.5V~5.5V. In the operating environment, the temperature is -55°C~125°C TA. It is an electronic flip flop with the type JK Type. JK flip flop is a part of the 74ACseries of FPGAs. A frequency of 100MHzshould be the maximum output frequency. There are 16 terminations,The 74AC112family includes it. It is powered from a supply voltage of 3.3V. The input capacitance of this JK flip flopis 10pF farads. ACis the family of this D flip flop. This electronic part is mounted in the way of Through Hole. The electronic flip flop is designed with pins 16. This device has Negative Edgeas its clock edge trigger type. This device has the base part number FF/Latch. There is a 5.5Vmaximum supply voltage (Vsup). A total of 3.3/5V power supplies are needed to run it. Featuring the maximum design flexibility, it has an output current of 24mA . There is a consumption of 4μAof quiescent current from it. There are 2 channels available.
CD74AC112E Features
Tube package
74AC series
16 pins
3.3/5V power supplies
CD74AC112E Applications
There are a lot of Texas Instruments CD74AC112E Flip Flops applications.
- Common Clocks
- Communications
- ESCC
- Instrumentation
- Computers
- High Performance Logic for test systems
- Buffered Clock
- Divide a clock signal by 2 or 4
- Latch-up performance
- Parallel data storage
