CD74AC174E
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Contact Plating | Gold |
| Mount | Through Hole |
| Mounting Type | Through Hole |
| Package / Case | 16-DIP (0.300, 7.62mm) |
| Number of Pins | 16 |
| Weight | 951.693491mg |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Series | 74AC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Termination | Through Hole |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1.5V~5.5V |
| Terminal Position | DUAL |
| Supply Voltage | 3.3V |
| Terminal Pitch | 2.54mm |
| Base Part Number | 74AC174 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3/5V |
| Number of Circuits | 7 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Number of Bits | 6 |
| Clock Frequency | 95MHz |
| Propagation Delay | 169 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 3.4 ns |
| Family | AC |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 18.9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 10pF |
| Power Supply Current-Max (ICC) | 0.08mA |
| Number of Output Lines | 6 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 5.08mm |
| Length | 19.3mm |
| Width | 6.35mm |
| Thickness | 3.9mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CD74AC174E Overview
In the form of 16-DIP (0.300, 7.62mm), it has been packaged. A package named Tubeincludes it. In the configuration, Non-Invertedis used as the output. It is configured with a trigger that uses Positive Edge. There is an electrical part that is mounted in the way of Through Hole. The JK flip flop operates at a voltage of 1.5V~5.5V. Temperature is set to -55°C~125°C TA. The type of this D latch is D-Type. The FPGA belongs to the 74AC series. Its output frequency should not exceed 95MHz. D latch consists of 1 elements. A total of 16 terminations have been made. The 74AC174 family contains it. The power source is powered by 3.3V. This T flip flop has a capacitance of 10pF farads at the input. In terms of electronic devices, this device belongs to the ACfamily of devices. Electronic part Through Holeis mounted in the way. 16pins are included in its design. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. The flip flop is designed with 6bits. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. To achieve this superior flexibility, 7 circuits are used. There are 3.3/5V power supplies attached to it. As a result of its output current of 24mA, it is very flexible in terms of design. In order for the chip to function, it has 6output lines. Quiescent current is consumed by the D latch in the amount of 8μA.
CD74AC174E Features
Tube package
74AC series
16 pins
6 Bits
3.3/5V power supplies
CD74AC174E Applications
There are a lot of Texas Instruments CD74AC174E Flip Flops applications.
- Synchronous counter
- Balanced Propagation Delays
- Storage registers
- Latch
- Single Down Count-Control Line
- Bus hold
- Individual Asynchronous Resets
- Data Synchronizers
- Data transfer
- Balanced 24 mA output drivers
