Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 5 days ago) |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Number of Pins |
20 |
Weight |
500.709277mg |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Cut Tape (CT) |
Series |
74AC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
ECCN Code |
EAR99 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
1.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Base Part Number |
74AC273 |
Function |
Master Reset |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3/5V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Output Current |
24mA |
Number of Bits |
8 |
Clock Frequency |
100MHz |
Propagation Delay |
169 ns |
Quiescent Current |
8μA |
Turn On Delay Time |
3.4 ns |
Family |
AC |
Logic Function |
D-Type, Flip-Flop |
Current - Output High, Low |
24mA 24mA |
Max I(ol) |
0.024 A |
Max Propagation Delay @ V, Max CL |
13.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
Clock Edge Trigger Type |
Positive Edge |
Height |
2.65mm |
Length |
12.8mm |
Width |
7.5mm |
Thickness |
2.35mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
CD74AC273M96 Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. A package named Cut Tape (CT)includes it. T flip flop is configured with an output of Non-Inverted. The trigger it is configured with uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. It operates with a supply voltage of 1.5V~5.5V. A temperature of -55°C~125°C TAis used in the operation. This logic flip flop is classified as type D-Type. JK flip flop is a part of the 74ACseries of FPGAs. This D flip flop should not have a frequency greater than 100MHz. There are 1 elements in it. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. It is a member of the 74AC273 family. It is powered from a supply voltage of 3.3V. JK flip flop input capacitance is 10pF farads. A device of this type belongs to the family of AC. A part of the electronic system is mounted in the way of Surface Mount. The 20pins are designed into the board. Its clock edge trigger type is Positive Edge. This device is part of the FF/Latchesbase part number family. There are 8bits in this flip flop. The maximal supply voltage (Vsup) reaches 5.5V. Due to its superior flexibility, it uses 8 circuits. As a result of its reliable performance, this T flip flop is suitable for TR. A total of 3.3/5V power supplies are needed to run it. The output current of 24mA makes it feature maximum design flexibility. There is 8μA quiescent current consumption by it.
CD74AC273M96 Features
Cut Tape (CT) package
74AC series
20 pins
8 Bits
3.3/5V power supplies
CD74AC273M96 Applications
There are a lot of Texas Instruments CD74AC273M96 Flip Flops applications.
- Frequency Divider circuits
- Count Modes
- Patented noise
- Convert a momentary switch to a toggle switch
- Consumer
- Storage registers
- Memory
- Parallel data storage
- Circuit Design
- Computing